Filter out redundant plugs that have no connection inside cell while export Verilog netlist - Githubissues

lip6 / coriolis

Coriolis VLSI EDA Tool (LIP6)

https://coriolis.lip6.fr

GNU General Public License v2.0

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Filter out redundant plugs that have no connection inside cell while export Verilog netlist #84

Closed lanserge closed 8 months ago