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Linux on LiteX-VexRiscv
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make/soc_linux: Add support for FDT Overlays #223

Closed geertu closed 3 years ago

geertu commented 3 years ago

FPGA development boards typically have many expansion connectors, while the board DTS as generated by LiteX describes only a part of the system.

Add support for describing hardware connected to expansion connectors using Flattened Device Tree Overlays.

Generation of the final DTB is done in two steps:

  1. Compile the board DTS into a board DTB, with or without symbols, depending on the presence of overlays,
  2. Combine the board DTB and all specified overlays (if any) into the final rv32.dtb using fdtoverlay. If no overlays are specified, a shortcut is taken by just copying the DTB, to avoid relying on the fdtoverlay tool being installed.

Example:

./make.py --board=orangecrab --cpu-count=1 --load --fdtoverlays="adafruit-featherwing-quad-alphanumeric-red.dtbo adafruit-featherwing-oled.dtbo"

Signed-off-by: Geert Uytterhoeven geert@linux-m68k.org

geertu commented 3 years ago

The sample overlay source files can be found at https://gist.github.com/geertu/2ef351008bd614e28b1be20fa1c7361d https://gist.github.com/geertu/59570a10e2a975e5ead5dc14bcc4aa5b

geertu commented 3 years ago

As a picture says more than 1000 words https://society.oftrolls.com/@geert/105996716422075863

mithro commented 3 years ago

FYI -- @shenki @gregdavill @antonblanchard -- I think you'll be interested in both this CL and the picture that @geertu just posted.

mithro commented 3 years ago

@mateusz-holenko / @gsomlo - Do you understand device tree enough to check this looks good?

enjoy-digital commented 3 years ago

Thanks @geertu, sorry for the delay. This is a very interesting feature, thanks for sharing your device tree knowledge with us.