litex-hub / linux-on-litex-vexriscv

Linux on LiteX-VexRiscv
BSD 2-Clause "Simplified" License
551 stars 174 forks source link

FATAL ERROR: Couldn't open output file images/rv32.dtb: No such file or directory #314

Closed matsbror closed 1 year ago

matsbror commented 1 year ago

I am simply following the instructions on how to get started in this project and am stuck when running ./sim.py

The only deviation I have taken is to use a more moden RISCV toolchain as the 8.10 one in the instructions seems a bit old.

When running ./sim.py I eventually end up with:

FATAL ERROR: Couldn't open output file images/rv32.dtb: No such file or directory

see attached log.

Any pointers on how to proceed would be appreciated.

sim.log

Dolu1990 commented 1 year ago

Hi,

I just tried with a fresh clone, worked fine. Did you downloaded and unziped linux_2022_03_23.zip from https://github.com/litex-hub/linux-on-litex-vexriscv/issues/164 ?

in order to have the images folder with all the binaries inside ?

matsbror commented 1 year ago

Thanks, no I did not. I interpreted the instructions as if this was optional and thought that the images would be re-generated.

matsbror commented 1 year ago

Now there's another problem:

%Error-TIMESCALEMOD: /home/mats/fpga/pythondata-cpu-vexriscv-smp/pythondata_cpu_vexriscv_smp/verilog/Ram_1w_1rs_Generic.v:2:8: Timescale missing on this module as other modules have it (IEEE 1800-2017 3.14.2.2)
                     /home/mats/fpga/pythondata-cpu-vexriscv-smp/pythondata_cpu_vexriscv_smp/verilog/VexRiscvLitexSmpCluster_Cc1_Iw32Is4096Iy1_Dw32Ds4096Dy1_ITs4DTs4_Ldw32_Ood.v:7:8: ... Location of module with timescale
    7 | module VexRiscvLitexSmpCluster_Cc1_Iw32Is4096Iy1_Dw32Ds4096Dy1_ITs4DTs4_Ldw32_Ood (
      |        ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
%Error: Exiting due to 1 error(s)

I have attached the log. sim-build.log

Dolu1990 commented 1 year ago

Which version of verilator do you use ? (i have a 4.2xx one, no issue with it)

matsbror commented 1 year ago

It's version 4.038 (what I got from apt install verilator). I am now trying to build a newer version to see if it makes a difference.

This was the issue. With version 5.003 of Verilator it works. Maybe there should be an update to the instructions about this.

Dolu1990 commented 1 year ago

Hooo, didn't knew 5.xxx was out XD Will take a look into it.

readme updated ^^