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Linux on LiteX-VexRiscv
BSD 2-Clause "Simplified" License
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ULX3S: Quad-core system hangs at FPGA manager framework #362

Open stettberger opened 1 year ago

stettberger commented 1 year ago

TL;DR: Multi-Core System does not boot Linux. Framebuffer makes everything worse

Hello! I have the goal to build a quad-core RISC-V system that I load onto an ULX3S Board (ECP-85F). In the long term, I want to use this setup to give university-level lecture on multi-core operating system construction.

At this point, I want to boot a Linux system on a synthesized quadcore to test the gateware, before I start porting my own software there, hunting gateware-level bugs. Also: I'm aware of other softcores (Rocket, NaxRiscv, PULP) but my current goal is to make it running with the VexRiscv.

Problem

I am not able to get a multi-core system with > 2 cores running as it hangs before the user-land fully starts. The last line on the litex_terminal is:

[  268.081505] FPGA manager framework

Suspicion: I suspect two problems here: There is some multicore problem and the litex framebuffer yields unfavorable logic for the ulx3s.

Overview

I got a dual core system to boot with --board=ulx3s --cpu-count=2 --with-wishbone-memory --device LFE5U-85F. However, I had to reduce the system clock to 25Mhz and disable the "framebuffer". Besides from that, I tried the following configurations:

Detail for 4 cores

As an example, I will provide the some logs for my last attempt (4 cores, 25 Mhz, no framebuffer, no whishbone memory).

For this test, I built the buildroot by myself. but I also tried the downloaded/pre-built buildroot before, and it gave the same problem.

Version Info:

$  yosys -V
Yosys 0.34+23 (git sha1 59fbee400, clang 10.0.0-4ubuntu1 -fPIC -Os)
$  nextpnr-ecp5 -V
"nextpnr-ecp5" -- Next Generation Place and Route (Version nextpnr-0.6-119-g5a2eff21)
$  ecppack --version
Project Trellis - Open Source Tools for ECP5 FPGAs
Version 1.4-64-g36c615d
/home/stettberger/ulx3s/oss-cad-suite/libexec/ecppack: ECP5 bitstream packer
$  git log --oneline | head -n1                      :(
108c020 buildroot/configs/litex_vexriscv_xx: fixed missing C library by replacing BR2_RISCV_ISA_CUSTOM to BR2_RISCV_ISA (buildroot's commit cbd91e89e4)
$ git diff
diff --git a/make.py b/make.py
index 31ebb38..3511214 100755
--- a/make.py
+++ b/make.py
@@ -412,7 +412,10 @@ class VersaECP5(Board):
 # ULX3S support ------------------------------------------------------------------------------------

 class ULX3S(Board):
-    soc_kwargs = {"l2_size" : 2048} # Use Wishbone and L2 for memory accesses.
+    soc_kwargs = {
+        "l2_size" : 2048,
+        "sys_clk_freq"  : 25e6
+    }
     def __init__(self):
         from litex_boards.targets import radiona_ulx3s
         Board.__init__(self, radiona_ulx3s.BaseSoC, soc_capabilities={
@@ -421,7 +424,7 @@ class ULX3S(Board):
             # Storage
             "sdcard",
             # Video,
-            "framebuffer",
+            #"framebuffer",
         })

Building it:

$ python3 ./make.py --board=ulx3s --cpu-count=4 --device LFE5U-85F --build  1968.86s user 5.86s system 101% cpu 32:33.40 total
[...]
Info: Device utilisation:
Info:             TRELLIS_IO:    58/  365    15%
Info:                   DCCA:     2/   56     3%
Info:                 DP16KD:    54/  208    25%
Info:             MULT18X18D:    16/  156    10%
Info:                 ALU54B:     0/   78     0%
Info:                EHXPLLL:     1/    4    25%
Info:                EXTREFB:     0/    2     0%
Info:                   DCUA:     0/    2     0%
Info:              PCSCLKDIV:     0/    2     0%
Info:                IOLOGIC:    45/  224    20%
Info:               SIOLOGIC:     0/  141     0%
Info:                    GSR:     0/    1     0%
Info:                  JTAGG:     0/    1     0%
Info:                   OSCG:     0/    1     0%
Info:                  SEDGA:     0/    1     0%
Info:                    DTR:     0/    1     0%
Info:                USRMCLK:     0/    1     0%
Info:                CLKDIVF:     0/    4     0%
Info:              ECLKSYNCB:     0/   10     0%
Info:                DLLDELD:     0/    8     0%
Info:                 DDRDLL:     0/    4     0%
Info:                DQSBUFM:     0/   14     0%
Info:        TRELLIS_ECLKBUF:     0/    8     0%
Info:           ECLKBRIDGECS:     0/    2     0%
Info:                   DCSC:     0/    2     0%
Info:             TRELLIS_FF: 18261/83640    21%
Info:           TRELLIS_COMB: 44009/83640    52%
Info:           TRELLIS_RAMW:  1042/10455     9%

Info: Placed 104 cells based on constraints.
Info: Creating initial analytic placement for 38618 cells, random placement wirelen = 4416409.
Info:     at initial placer iter 0, wirelen = 19903
Info:     at initial placer iter 1, wirelen = 14704
Info:     at initial placer iter 2, wirelen = 13992
Info:     at initial placer iter 3, wirelen = 13826
Info: Running main analytical placer, max placement attempts per cell = 10000.
Info:     at iteration #1, type ALL: wirelen solved = 13580, spread = 944766, legal = 949921; time = 1.64s
Info:     at iteration #2, type ALL: wirelen solved = 123266, spread = 613651, legal = 627370; time = 1.55s
Info:     at iteration #3, type ALL: wirelen solved = 218075, spread = 450466, legal = 465201; time = 1.41s
Info:     at iteration #4, type ALL: wirelen solved = 235938, spread = 388165, legal = 406800; time = 1.42s
Info:     at iteration #5, type ALL: wirelen solved = 240344, spread = 365203, legal = 385378; time = 1.41s
Info:     at iteration #6, type ALL: wirelen solved = 244521, spread = 380251, legal = 395590; time = 1.52s
Info:     at iteration #7, type ALL: wirelen solved = 250417, spread = 371310, legal = 388248; time = 1.37s
Info:     at iteration #8, type ALL: wirelen solved = 252804, spread = 350139, legal = 371379; time = 1.41s
Info:     at iteration #9, type ALL: wirelen solved = 256966, spread = 346522, legal = 368126; time = 1.32s
Info:     at iteration #10, type ALL: wirelen solved = 259302, spread = 342765, legal = 361886; time = 1.56s
Info:     at iteration #11, type ALL: wirelen solved = 261383, spread = 341305, legal = 360208; time = 1.56s
Info:     at iteration #12, type ALL: wirelen solved = 264517, spread = 339997, legal = 360932; time = 1.36s
Info:     at iteration #13, type ALL: wirelen solved = 265706, spread = 340048, legal = 357586; time = 1.35s
Info:     at iteration #14, type ALL: wirelen solved = 268650, spread = 345402, legal = 363663; time = 1.35s
Info:     at iteration #15, type ALL: wirelen solved = 277644, spread = 345854, legal = 362212; time = 1.35s
Info:     at iteration #16, type ALL: wirelen solved = 277962, spread = 344648, legal = 362184; time = 1.36s
Info:     at iteration #17, type ALL: wirelen solved = 278888, spread = 342876, legal = 359448; time = 1.32s
Info:     at iteration #18, type ALL: wirelen solved = 278010, spread = 342702, legal = 359933; time = 1.37s
Info: HeAP Placer Time: 40.57s
Info:   of which solving equations: 22.57s
Info:   of which spreading cells: 5.23s
Info:   of which strict legalisation: 1.72s

Info: Running simulated annealing placer for refinement.
Info:   at iteration #1: temp = 0.000000, timing cost = 6419, wirelen = 357586
Info:   at iteration #5: temp = 0.000000, timing cost = 5244, wirelen = 332997
Info:   at iteration #10: temp = 0.000000, timing cost = 8135, wirelen = 325328
Info:   at iteration #15: temp = 0.000000, timing cost = 8959, wirelen = 323616
Info:   at iteration #20: temp = 0.000000, timing cost = 8867, wirelen = 322985
Info:   at iteration #20: temp = 0.000000, timing cost = 8858, wirelen = 323008 
Info: SA placement time 109.28s

Info: Max frequency for clock '$glbnet$crg_clkout0': 29.62 MHz (PASS at 25.00 MHz)

Info: Clock '$glbnet$crg_clkout1' has no interior paths

Info: Max delay <async>                     -> posedge $glbnet$crg_clkout0: 15.18 ns
Info: Max delay posedge $glbnet$crg_clkout0 -> <async>                    : 9.28 ns

[...]

Info: Max frequency for clock '$glbnet$crg_clkout0': 47.61 MHz (PASS at 25.00 MHz)

Info: Clock '$glbnet$crg_clkout1' has no interior paths

Info: Max delay <async>                     -> posedge $glbnet$crg_clkout0: 7.90 ns
Info: Max delay posedge $glbnet$crg_clkout0 -> <async>                    : 5.66 ns

Info: Slack histogram:
Info:  legend: * represents 126 endpoint(s)
Info:          + represents [1,126) endpoint(s)
Info: [ 18998,  20005) |+
Info: [ 20005,  21012) |+
Info: [ 21012,  22019) |+
Info: [ 22019,  23026) |*+
Info: [ 23026,  24033) |******+
Info: [ 24033,  25040) |****************+
Info: [ 25040,  26047) |********************+
Info: [ 26047,  27054) |********************+
Info: [ 27054,  28061) |**********************+
Info: [ 28061,  29068) |*****************************+
Info: [ 29068,  30075) |***************************************+
Info: [ 30075,  31082) |*******************************************************+
Info: [ 31082,  32089) |************************************************************ 
Info: [ 32089,  33096) |**********************************+
Info: [ 33096,  34103) |***************************+
Info: [ 34103,  35110) |*****************************+
Info: [ 35110,  36117) |****************************+
Info: [ 36117,  37124) |******************************+
Info: [ 37124,  38131) |*******************************************+
Info: [ 38131,  39138) |***************************+

Info: Program finished normally.

Loading it:

$ python3 ./make.py --board=ulx3s  --cpu-count=4 --device LFE5U-85F --load
[...]
python3 -m litex.soc.software.memusage bios.elf /home/stettberger/ulx3s/linux-on-litex-vexriscv/build/ulx3s/software/bios/../include/generated/regions.ld riscv64-unknown-elf

ROM usage: 34.86KiB     (54.46%)
RAM usage: 0.55KiB  (9.24%)

rm crt0.o
make: Leaving directory '/home/stettberger/ulx3s/linux-on-litex-vexriscv/build/ulx3s/software/bios'
INFO:SoC:Initializing ROM rom with contents (Size: 0x8b7c).
INFO:SoC:Auto-Resizing ROM rom from 0x10000 to 0x8b7c.
ULX2S / ULX3S JTAG programmer v 3.0.92 (built Oct  9 2020 12:55:43)
Using USB cable: ULX3S FPGA 12K v3.0.3
Programming: 100%  
Completed in 19.35 seconds.

Boot Log

        __   _ __      _  __
       / /  (_) /____ | |/_/
      / /__/ / __/ -_)>  <
     /____/_/\__/\__/_/|_|
   Build your hardware, easily!

 (c) Copyright 2012-2023 Enjoy-Digital
 (c) Copyright 2007-2015 M-Labs

 BIOS CRC passed (0d9603e4)

 LiteX git sha1: 16fcfb9d

--=============== SoC ==================--
CPU:        VexRiscv SMP-LINUX @ 25MHz
BUS:        WISHBONE 32-bit @ 4GiB
CSR:        32-bit data
ROM:        64.0KiB
SRAM:       6.0KiB
L2:     2.0KiB
SDRAM:      32.0MiB 16-bit @ 25MT/s (CL-2 CWL-2)
MAIN-RAM:   32.0MiB

--========== Initialization ============--
Initializing SDRAM @0x40000000...
Switching SDRAM to software control.
Switching SDRAM to hardware control.
Memtest at 0x40000000 (2.0MiB)...
  Write: 0x40000000-0x40200000 2.0MiB     
   Read: 0x40000000-0x40200000 2.0MiB     
Memtest OK
Memspeed at 0x40000000 (Sequential, 2.0MiB)...
  Write speed: 7.7MiB/s
   Read speed: 10.0MiB/s

--============== Boot ==================--
Booting from serial...
Press Q or ESC to abort boot completely.
sL5DdSMmkekro
Timeout
Booting from SDCard in SD-Mode...
Booting from boot.json...
Copying Image to 0x40000000 (7742944 bytes)...
[########################################]
Copying rv32.dtb to 0x40ef0000 (4265 bytes)...
[########################################]
Copying rootfs.cpio to 0x41000000 (3574784 bytes)...
[########################################]
Copying opensbi.bin to 0x40f00000 (263652 bytes)...
[########################################]
Executing booted program at 0x40f00000

--============= Liftoff! ===============--

OpenSBI v1.3
   ____                    _____ ____ _____
  / __ \                  / ____|  _ \_   _|
 | |  | |_ __   ___ _ __ | (___ | |_) || |
 | |  | | '_ \ / _ \ '_ \ \___ \|  _ < | |
 | |__| | |_) |  __/ | | |____) | |_) || |_
  \____/| .__/ \___|_| |_|_____/|____/_____|
        | |
        |_|

Platform Name             : LiteX / VexRiscv-SMP
Platform Features         : medeleg
Platform HART Count       : 8
Platform IPI Device       : aclint-mswi
Platform Timer Device     : aclint-mtimer @ 100000000Hz
Platform Console Device   : litex_uart
Platform HSM Device       : ---
Platform PMU Device       : ---
Platform Reboot Device    : ---
Platform Shutdown Device  : ---
Platform Suspend Device   : ---
Platform CPPC Device      : ---
Firmware Base             : 0x40f00000
Firmware Size             : 376 KB
Firmware RW Offset        : 0x40000
Firmware RW Size          : 120 KB
Firmware Heap Offset      : 0x52000
Firmware Heap Size        : 48 KB (total), 3 KB (reserved), 8 KB (used), 36 KB (free)
Firmware Scratch Size     : 4096 B (total), 452 B (used), 3644 B (free)
Runtime SBI Version       : 1.0

Domain0 Name              : root
Domain0 Boot HART         : 0
Domain0 HARTs             : 0*,1*,2*,3*,4*,5*,6*,7*
Domain0 Region00          : 0xf0018000-0xf001bfff M: (I,R,W) S/U: ()
Domain0 Region01          : 0xf0010000-0xf0017fff M: (I,R,W) S/U: ()
Domain0 Region02          : 0x40f40000-0x40f5ffff M: (R,W) S/U: ()
Domain0 Region03          : 0x40f00000-0x40f3ffff M: (R,X) S/U: ()
Domain0 Region04          : 0x00000000-0xffffffff M: (R,W,X) S/U: (R,W,X)
Domain0 Next Address      : 0x40000000
Domain0 Next Arg1         : 0x40ef0000
Domain0 Next Mode         : S-mode
Domain0 SysReset          : yes
Domain0 SysSuspend        : yes

Boot HART ID              : 0
Boot HART Domain          : root
Boot HART Priv Version    : v1.10
Boot HART Base ISA        : rv32ima
Boot HART ISA Extensions  : zicntr
Boot HART PMP Count       : 0
Boot HART PMP Granularity : 0
Boot HART PMP Address Bits: 0
Boot HART MHPM Count      : 0
Boot HART MIDELEG         : 0x00000222
Boot HART MEDELEG         : 0x0000b109
[    0.000000] Linux version 6.1.0-rc2 (stettberger@obelix) (riscv32-buildroot-linux-gnu-gcc.br_real (Buildroot 2023.08-756-g3f23277c41) 11.4.0, GNU ld (GNU Binutils) 2.40) #1 SMP Wed Oct 18 13:07:26 CEST 2023
[    0.000000] earlycon: liteuart0 at I/O port 0x0 (options '')
[    0.000000] Malformed early option 'console'
[    0.000000] earlycon: liteuart0 at MMIO 0xf0001000 (options '')
[    0.000000] printk: bootconsole [liteuart0] enabled
[    0.000000] OF: reserved mem: OVERLAP DETECTED!
[    0.000000] mmode_resv1@40f00000 (0x40f00000--0x40f40000) overlaps with opensbi@40f00000 (0x40f00000--0x40f80000)
[    0.000000] OF: reserved mem: OVERLAP DETECTED!
[    0.000000] opensbi@40f00000 (0x40f00000--0x40f80000) overlaps with mmode_resv0@40f40000 (0x40f40000--0x40f60000)
[    0.000000] Zone ranges:
[    0.000000]   Normal   [mem 0x0000000040000000-0x0000000041ffffff]
[    0.000000] Movable zone start for each node
[    0.000000] Early memory node ranges
[    0.000000]   node   0: [mem 0x0000000040000000-0x0000000040efffff]
[    0.000000]   node   0: [mem 0x0000000040f00000-0x0000000040f5ffff]
[    0.000000]   node   0: [mem 0x0000000040f60000-0x0000000041ffffff]
[    0.000000] Initmem setup node 0 [mem 0x0000000040000000-0x0000000041ffffff]
[    0.000000] SBI specification v1.0 detected
[    0.000000] SBI implementation ID=0x1 Version=0x10003
[    0.000000] SBI TIME extension detected
[    0.000000] SBI IPI extension detected
[    0.000000] SBI RFENCE extension detected
[    0.000000] SBI HSM extension detected
[    0.000000] riscv: base ISA extensions aim
[    0.000000] riscv: ELF capabilities aim
[    0.000000] percpu: Embedded 8 pages/cpu s11732 r0 d21036 u32768
[    0.000000] Built 1 zonelists, mobility grouping on.  Total pages: 8128
[    0.000000] Kernel command line: console=liteuart earlycon=liteuart,0xf0001000 rootwait root=/dev/ram0
[    0.000000] Dentry cache hash table entries: 4096 (order: 2, 16384 bytes, linear)
[    0.000000] Inode-cache hash table entries: 2048 (order: 1, 8192 bytes, linear)
[    0.000000] mem auto-init: stack:off, heap alloc:off, heap free:off
[    0.000000] Memory: 15780K/32768K available (5856K kernel code, 573K rwdata, 908K rodata, 218K init, 254K bss, 16988K reserved, 0K cma-reserved)
[    0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=4, Nodes=1
[    0.000000] rcu: Hierarchical RCU implementation.
[    0.000000] rcu:     RCU restricting CPUs from NR_CPUS=32 to nr_cpu_ids=4.
[    0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 25 jiffies.
[    0.000000] rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=4
[    0.000000] NR_IRQS: 64, nr_irqs: 64, preallocated irqs: 0
[    0.000000] riscv-intc: 32 local interrupts mapped
[    0.000000] plic: interrupt-controller@f0c00000: mapped 32 interrupts with 4 handlers for 8 contexts.
[    0.000000] rcu: srcu_init: Setting srcu_struct sizes based on contention.
[    0.000000] riscv-timer: riscv_timer_init_dt: Registering clocksource cpuid [0] hartid [0]
[    0.000000] clocksource: riscv_clocksource: mask: 0xffffffffffffffff max_cycles: 0x5c40939b5, max_idle_ns: 440795202646 ns
[    0.000206] sched_clock: 64 bits at 25MHz, resolution 40ns, wraps every 4398046511100ns
[    0.036728] Console: colour dummy device 80x25
[    0.053557] Calibrating delay loop (skipped), value calculated using timer frequency.. 50.00 BogoMIPS (lpj=100000)
[    0.071608] pid_max: default: 32768 minimum: 301
[    0.143136] Mount-cache hash table entries: 1024 (order: 0, 4096 bytes, linear)
[    0.155618] Mountpoint-cache hash table entries: 1024 (order: 0, 4096 bytes, linear)
[    0.701152] ASID allocator using 9 bits (512 entries)
[    0.761225] rcu: Hierarchical SRCU implementation.
[    0.769864] rcu:     Max phase no-delay instances is 1000.
[    0.960295] smp: Bringing up secondary CPUs ...
[    2.076259] smp: Brought up 1 node, 4 CPUs
[    3.364567] devtmpfs: initialized
[   15.078624] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 7645041785100000 ns
[   15.153398] futex hash table entries: 1024 (order: 4, 65536 bytes, linear)
[  108.081743] NET: Registered PF_NETLINK/PF_ROUTE protocol family
[  251.494998] DMA: preallocated 128 KiB GFP_KERNEL pool for atomic allocations
[  267.635269] pps_core: LinuxPPS API ver. 1 registered
[  267.670685] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>
[  267.740392] PTP clock support registered
[  268.081505] FPGA manager framework

Working Variant

For comparision reasons, I also attached the boot log form the working 2 core machine (wishbone memory, 25 Mhz, no framebuffer):

--============== Boot ==================--
Booting from serial...
Press Q or ESC to abort boot completely.
sL5DdSMmkekro
Timeout
Booting from SDCard in SD-Mode...
Booting from boot.json...
Copying Image to 0x40000000 (7742944 bytes)...
[########################################]
Copying rv32.dtb to 0x40ef0000 (3273 bytes)...
[########################################]
Copying rootfs.cpio to 0x41000000 (3574784 bytes)...
[########################################]
Copying opensbi.bin to 0x40f00000 (263652 bytes)...
[########################################]
Executing booted program at 0x40f00000

--============= Liftoff! ===============--

OpenSBI v1.3
   ____                    _____ ____ _____
  / __ \                  / ____|  _ \_   _|
 | |  | |_ __   ___ _ __ | (___ | |_) || |
 | |  | | '_ \ / _ \ '_ \ \___ \|  _ < | |
 | |__| | |_) |  __/ | | |____) | |_) || |_
  \____/| .__/ \___|_| |_|_____/|____/_____|
        | |
        |_|

Platform Name             : LiteX / VexRiscv-SMP
Platform Features         : medeleg
Platform HART Count       : 8
Platform IPI Device       : aclint-mswi
Platform Timer Device     : aclint-mtimer @ 100000000Hz
Platform Console Device   : litex_uart
Platform HSM Device       : ---
Platform PMU Device       : ---
Platform Reboot Device    : ---
Platform Shutdown Device  : ---
Platform Suspend Device   : ---
Platform CPPC Device      : ---
Firmware Base             : 0x40f00000
Firmware Size             : 376 KB
Firmware RW Offset        : 0x40000
Firmware RW Size          : 120 KB
Firmware Heap Offset      : 0x52000
Firmware Heap Size        : 48 KB (total), 3 KB (reserved), 8 KB (used), 36 KB (free)
Firmware Scratch Size     : 4096 B (total), 452 B (used), 3644 B (free)
Runtime SBI Version       : 1.0

Domain0 Name              : root
Domain0 Boot HART         : 0
Domain0 HARTs             : 0*,1*,2*,3*,4*,5*,6*,7*
Domain0 Region00          : 0xf0018000-0xf001bfff M: (I,R,W) S/U: ()
Domain0 Region01          : 0xf0010000-0xf0017fff M: (I,R,W) S/U: ()
Domain0 Region02          : 0x40f40000-0x40f5ffff M: (R,W) S/U: ()
Domain0 Region03          : 0x40f00000-0x40f3ffff M: (R,X) S/U: ()
Domain0 Region04          : 0x00000000-0xffffffff M: (R,W,X) S/U: (R,W,X)
Domain0 Next Address      : 0x40000000
Domain0 Next Arg1         : 0x40ef0000
Domain0 Next Mode         : S-mode
Domain0 SysReset          : yes
Domain0 SysSuspend        : yes

Boot HART ID              : 0
Boot HART Domain          : root
Boot HART Priv Version    : v1.10
Boot HART Base ISA        : rv32ima
Boot HART ISA Extensions  : zicntr
Boot HART PMP Count       : 0
Boot HART PMP Granularity : 0
Boot HART PMP Address Bits: 0
Boot HART MHPM Count      : 0
Boot HART MIDELEG         : 0x00000222
Boot HART MEDELEG         : 0x0000b109
[    0.000000] Linux version 6.1.0-rc2 (stettberger@obelix) (riscv32-buildroot-linux-gnu-gcc.br_real (Buildroot 2023.08-756-g3f23277c41) 11.4.0, GNU ld (GNU Binutils) 2.40) #1 SMP Wed Oct 18 13:07:26 CEST 2023
[    0.000000] earlycon: liteuart0 at I/O port 0x0 (options '')
[    0.000000] Malformed early option 'console'
[    0.000000] earlycon: liteuart0 at MMIO 0xf0001000 (options '')
[    0.000000] printk: bootconsole [liteuart0] enabled
[    0.000000] OF: reserved mem: OVERLAP DETECTED!
[    0.000000] mmode_resv1@40f00000 (0x40f00000--0x40f40000) overlaps with opensbi@40f00000 (0x40f00000--0x40f80000)
[    0.000000] OF: reserved mem: OVERLAP DETECTED!
[    0.000000] opensbi@40f00000 (0x40f00000--0x40f80000) overlaps with mmode_resv0@40f40000 (0x40f40000--0x40f60000)
[    0.000000] Zone ranges:
[    0.000000]   Normal   [mem 0x0000000040000000-0x0000000041ffffff]
[    0.000000] Movable zone start for each node
[    0.000000] Early memory node ranges
[    0.000000]   node   0: [mem 0x0000000040000000-0x0000000040efffff]
[    0.000000]   node   0: [mem 0x0000000040f00000-0x0000000040f5ffff]
[    0.000000]   node   0: [mem 0x0000000040f60000-0x0000000041ffffff]
[    0.000000] Initmem setup node 0 [mem 0x0000000040000000-0x0000000041ffffff]
[    0.000000] SBI specification v1.0 detected
[    0.000000] SBI implementation ID=0x1 Version=0x10003
[    0.000000] SBI TIME extension detected
[    0.000000] SBI IPI extension detected
[    0.000000] SBI RFENCE extension detected
[    0.000000] SBI HSM extension detected
[    0.000000] riscv: base ISA extensions aim
[    0.000000] riscv: ELF capabilities aim
[    0.000000] percpu: Embedded 8 pages/cpu s11732 r0 d21036 u32768
[    0.000000] Built 1 zonelists, mobility grouping on.  Total pages: 8128
[    0.000000] Kernel command line: console=liteuart earlycon=liteuart,0xf0001000 rootwait root=/dev/ram0
[    0.000000] Dentry cache hash table entries: 4096 (order: 2, 16384 bytes, linear)
[    0.000000] Inode-cache hash table entries: 2048 (order: 1, 8192 bytes, linear)
[    0.000000] mem auto-init: stack:off, heap alloc:off, heap free:off
[    0.000000] Memory: 15844K/32768K available (5856K kernel code, 573K rwdata, 908K rodata, 218K init, 254K bss, 16924K reserved, 0K cma-reserved)
[    0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=2, Nodes=1
[    0.000000] rcu: Hierarchical RCU implementation.
[    0.000000] rcu:     RCU restricting CPUs from NR_CPUS=32 to nr_cpu_ids=2.
[    0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 25 jiffies.
[    0.000000] rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=2
[    0.000000] NR_IRQS: 64, nr_irqs: 64, preallocated irqs: 0
[    0.000000] riscv-intc: 32 local interrupts mapped
[    0.000000] plic: interrupt-controller@f0c00000: mapped 32 interrupts with 2 handlers for 4 contexts.
[    0.000000] rcu: srcu_init: Setting srcu_struct sizes based on contention.
[    0.000000] riscv-timer: riscv_timer_init_dt: Registering clocksource cpuid [0] hartid [0]
[    0.000000] clocksource: riscv_clocksource: mask: 0xffffffffffffffff max_cycles: 0xb8812736b, max_idle_ns: 440795202655 ns
[    0.000100] sched_clock: 64 bits at 50MHz, resolution 20ns, wraps every 4398046511100ns
[    0.015999] Console: colour dummy device 80x25
[    0.021820] Calibrating delay loop (skipped), value calculated using timer frequency.. 100.00 BogoMIPS (lpj=200000)
[    0.029606] pid_max: default: 32768 minimum: 301
[    0.055727] Mount-cache hash table entries: 1024 (order: 0, 4096 bytes, linear)
[    0.062081] Mountpoint-cache hash table entries: 1024 (order: 0, 4096 bytes, linear)
[    0.263285] ASID allocator using 9 bits (512 entries)
[    0.285296] rcu: Hierarchical SRCU implementation.
[    0.289747] rcu:     Max phase no-delay instances is 1000.
[    0.349354] smp: Bringing up secondary CPUs ...
[    0.453813] smp: Brought up 1 node, 2 CPUs
[    0.531622] devtmpfs: initialized
[    0.858037] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 7645041785100000 ns
[    0.869109] futex hash table entries: 512 (order: 3, 32768 bytes, linear)
[    1.062481] NET: Registered PF_NETLINK/PF_ROUTE protocol family
[    1.094707] DMA: preallocated 128 KiB GFP_KERNEL pool for atomic allocations
[    2.644653] pps_core: LinuxPPS API ver. 1 registered
[    2.649444] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>
[    2.663433] PTP clock support registered
[    2.701497] FPGA manager framework
[    2.819398] clocksource: Switched to clocksource riscv_clocksource
[    5.858738] NET: Registered PF_INET protocol family
[    5.899993] IP idents hash table entries: 2048 (order: 2, 16384 bytes, linear)
[    6.007213] tcp_listen_portaddr_hash hash table entries: 512 (order: 0, 4096 bytes, linear)
[    6.018888] Table-perturb hash table entries: 65536 (order: 6, 262144 bytes, linear)
[    6.028407] TCP established hash table entries: 1024 (order: 0, 4096 bytes, linear)
[    6.040223] TCP bind hash table entries: 1024 (order: 2, 16384 bytes, linear)
[    6.054670] TCP: Hash tables configured (established 1024 bind 1024)
[    6.079224] UDP hash table entries: 256 (order: 1, 8192 bytes, linear)
[    6.091121] UDP-Lite hash table entries: 256 (order: 1, 8192 bytes, linear)
[    6.340530] Unpacking initramfs...
[    6.404121] workingset: timestamp_bits=30 max_order=12 bucket_order=0
[    9.528548] io scheduler mq-deadline registered
[    9.536422] io scheduler kyber registered
[    9.947160] LiteX SoC Controller driver initialized
[   29.395950] Initramfs unpacking failed: invalid magic at start of compressed archive
[   31.716848] Freeing initrd memory: 8192K
[   39.732602] f0001000.serial: ttyLXU0 at MMIO 0x0 (irq = 0, base_baud = 0) is a liteuart
[   39.748239] printk: console [liteuart0] enabled
[   39.748239] printk: console [liteuart0] enabled
[   39.759945] printk: bootconsole [liteuart0] disabled
[   39.759945] printk: bootconsole [liteuart0] disabled
[   40.100151] i2c_dev: i2c /dev entries driver
[   40.403568] litex-mmc f0004800.mmc: LiteX MMC controller initialized.
[   40.843484] NET: Registered PF_INET6 protocol family
[   41.123804] mmc0: new SDXC card at address b368
[   41.259578] Segment Routing with IPv6
[   41.280599] In-situ OAM (IOAM) with IPv6
[   41.303856] sit: IPv6, IPv4 and MPLS over IPv4 tunneling driver
[   41.514894] NET: Registered PF_PACKET protocol family
[   41.675188] mmcblk0: mmc0:b368 NCard 58.2 GiB 
[   41.920567]  mmcblk0: p1
[   42.155751] Freeing unused kernel image (initmem) memory: 212K
[   42.163517] Kernel memory protection not selected by kernel config.
[   42.171657] Run /init as init process
Saving 256 bits of non-creditable seed for next boot
Starting syslogd: OK
Starting klogd: OK
Running sysctl: OK
Starting network: OK

Welcome to Buildroot
buildroot login: root
                   __   _
                  / /  (_)__  __ ____ __
                 / /__/ / _ \/ // /\ \ /
                /____/_/_//_/\_,_//_\_\
                      / _ \/ _ \
   __   _ __      _  _\___/_//_/         ___  _
  / /  (_) /____ | |/_/__| | / /____ __ / _ \(_)__ _____  __
 / /__/ / __/ -_)>  </___/ |/ / -_) \ // , _/ (_-</ __/ |/ /
/____/_/\__/\__/_/|_|____|___/\__/_\_\/_/|_/_/___/\__/|___/
                  / __/  |/  / _ \
                 _\ \/ /|_/ / ___/
                /___/_/  /_/_/
  32-bit RISC-V Linux running on LiteX / VexRiscv-SMP.

login[76]: root login on 'console'
root@buildroot:~# cat /proc/cpuinit
cat: can't open '/proc/cpuinit': No such file or directory
root@buildroot:~# cat /proc/cpuinfo 
processor   : 0
hart        : 0
isa     : rv32ima
mmu     : sv32
mvendorid   : 0x0
marchid     : 0x0
mimpid      : 0x0

processor   : 1
hart        : 1
isa     : rv32ima
mmu     : sv32
mvendorid   : 0x0
marchid     : 0x0
mimpid      : 0x0
Dolu1990 commented 1 year ago

Hi,

One very possible cause to your slow boot issue is that the linux kernel tick too fast for a too slow system. By default the linux tick rate is 250hz which is fast for a 25 Mhz single core adding on that 3 other cores generating traffic (and ticking as well), + the slow wishbone memory, it is very probable that the quad core is only using time ticking and can't do any forward progress :)

There is a config in the in the kernel that you can enable : CONFIG_HZ_100 Let's me know how things goes :D

stettberger commented 1 year ago

@Dolu1990 CONFIG_HZ_100 really helped a lot. I'm now able to build and boot a quadcore system (see below). It was not enough to only enable 100 Hz ticks, but I also had to increase the clock frequency to 40 Mhz (with 45 Mhz in reach):

Info: Max frequency for clock '$glbnet$crg_clkout0': 45.77 MHz (PASS at 40.00 MHz)

For this repo:

I will now investigate on the framebuffer

Boot log (40 Mhz, 4 cores, CONFIG_HZ_100, no framebuffer)

--============= Liftoff! ===============--

OpenSBI v1.3
   ____                    _____ ____ _____
  / __ \                  / ____|  _ \_   _|
 | |  | |_ __   ___ _ __ | (___ | |_) || |
 | |  | | '_ \ / _ \ '_ \ \___ \|  _ < | |
 | |__| | |_) |  __/ | | |____) | |_) || |_
  \____/| .__/ \___|_| |_|_____/|____/_____|
        | |
        |_|

Platform Name             : LiteX / VexRiscv-SMP
Platform Features         : medeleg
Platform HART Count       : 8
Platform IPI Device       : aclint-mswi
Platform Timer Device     : aclint-mtimer @ 100000000Hz
Platform Console Device   : litex_uart
Platform HSM Device       : ---
Platform PMU Device       : ---
Platform Reboot Device    : ---
Platform Shutdown Device  : ---
Platform Suspend Device   : ---
Platform CPPC Device      : ---
Firmware Base             : 0x40f00000
Firmware Size             : 376 KB
Firmware RW Offset        : 0x40000
Firmware RW Size          : 120 KB
Firmware Heap Offset      : 0x52000
Firmware Heap Size        : 48 KB (total), 3 KB (reserved), 8 KB (used), 36 KB (free)
Firmware Scratch Size     : 4096 B (total), 452 B (used), 3644 B (free)
Runtime SBI Version       : 1.0

Domain0 Name              : root
Domain0 Boot HART         : 0
Domain0 HARTs             : 0*,1*,2*,3*,4*,5*,6*,7*
Domain0 Region00          : 0xf0018000-0xf001bfff M: (I,R,W) S/U: ()
Domain0 Region01          : 0xf0010000-0xf0017fff M: (I,R,W) S/U: ()
Domain0 Region02          : 0x40f40000-0x40f5ffff M: (R,W) S/U: ()
Domain0 Region03          : 0x40f00000-0x40f3ffff M: (R,X) S/U: ()
Domain0 Region04          : 0x00000000-0xffffffff M: (R,W,X) S/U: (R,W,X)
Domain0 Next Address      : 0x40000000
Domain0 Next Arg1         : 0x40ef0000
Domain0 Next Mode         : S-mode
Domain0 SysReset          : yes
Domain0 SysSuspend        : yes

Boot HART ID              : 0
Boot HART Domain          : root
Boot HART Priv Version    : v1.10
Boot HART Base ISA        : rv32ima
Boot HART ISA Extensions  : zicntr
Boot HART PMP Count       : 0
Boot HART PMP Granularity : 0
Boot HART PMP Address Bits: 0
Boot HART MHPM Count      : 0
Boot HART MIDELEG         : 0x00000222
Boot HART MEDELEG         : 0x0000b109
[    0.000000] Linux version 6.1.0-rc2 (stettberger@obelix) (riscv32-buildroot-linux-gnu-gcc.br_real (Buildroot 2023.08-756-g3f23277c41) 11.4.0, GNU ld (GNU Binutils) 2.40) #2 SMP Fri Oct 20 09:19:19 CEST 2023
[    0.000000] earlycon: liteuart0 at I/O port 0x0 (options '')
[    0.000000] Malformed early option 'console'
[    0.000000] earlycon: liteuart0 at MMIO 0xf0001000 (options '')
[    0.000000] printk: bootconsole [liteuart0] enabled
[    0.000000] OF: reserved mem: OVERLAP DETECTED!
[    0.000000] mmode_resv1@40f00000 (0x40f00000--0x40f40000) overlaps with opensbi@40f00000 (0x40f00000--0x40f80000)
[    0.000000] OF: reserved mem: OVERLAP DETECTED!
[    0.000000] opensbi@40f00000 (0x40f00000--0x40f80000) overlaps with mmode_resv0@40f40000 (0x40f40000--0x40f60000)
[    0.000000] Zone ranges:
[    0.000000]   Normal   [mem 0x0000000040000000-0x0000000041ffffff]
[    0.000000] Movable zone start for each node
[    0.000000] Early memory node ranges
[    0.000000]   node   0: [mem 0x0000000040000000-0x0000000040efffff]
[    0.000000]   node   0: [mem 0x0000000040f00000-0x0000000040f5ffff]
[    0.000000]   node   0: [mem 0x0000000040f60000-0x0000000041ffffff]
[    0.000000] Initmem setup node 0 [mem 0x0000000040000000-0x0000000041ffffff]
[    0.000000] SBI specification v1.0 detected
[    0.000000] SBI implementation ID=0x1 Version=0x10003
[    0.000000] SBI TIME extension detected
[    0.000000] SBI IPI extension detected
[    0.000000] SBI RFENCE extension detected
[    0.000000] SBI HSM extension detected
[    0.000000] riscv: base ISA extensions aim
[    0.000000] riscv: ELF capabilities aim
[    0.000000] percpu: Embedded 8 pages/cpu s11476 r0 d21292 u32768
[    0.000000] Built 1 zonelists, mobility grouping on.  Total pages: 8128
[    0.000000] Kernel command line: console=liteuart earlycon=liteuart,0xf0001000 rootwait root=/dev/ram0
[    0.000000] Dentry cache hash table entries: 4096 (order: 2, 16384 bytes, linear)
[    0.000000] Inode-cache hash table entries: 2048 (order: 1, 8192 bytes, linear)
[    0.000000] mem auto-init: stack:off, heap alloc:off, heap free:off
[    0.000000] Memory: 15780K/32768K available (5855K kernel code, 577K rwdata, 908K rodata, 215K init, 254K bss, 16988K reserved, 0K cma-reserved)
[    0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=4, Nodes=1
[    0.000000] rcu: Hierarchical RCU implementation.
[    0.000000] rcu:     RCU restricting CPUs from NR_CPUS=32 to nr_cpu_ids=4.
[    0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 10 jiffies.
[    0.000000] rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=4
[    0.000000] NR_IRQS: 64, nr_irqs: 64, preallocated irqs: 0
[    0.000000] riscv-intc: 32 local interrupts mapped
[    0.000000] plic: interrupt-controller@f0c00000: mapped 32 interrupts with 4 handlers for 8 contexts.
[    0.000000] rcu: srcu_init: Setting srcu_struct sizes based on contention.
[    0.000000] riscv-timer: riscv_timer_init_dt: Registering clocksource cpuid [0] hartid [0]
[    0.000000] clocksource: riscv_clocksource: mask: 0xffffffffffffffff max_cycles: 0x939a85c40, max_idle_ns: 440795202120 ns
[    0.000111] sched_clock: 64 bits at 40MHz, resolution 25ns, wraps every 4398046511100ns
[    0.021973] Console: colour dummy device 80x25
[    0.028531] Calibrating delay loop (skipped), value calculated using timer frequency.. 80.00 BogoMIPS (lpj=400000)
[    0.041532] pid_max: default: 32768 minimum: 301
[    0.070511] Mount-cache hash table entries: 1024 (order: 0, 4096 bytes, linear)
[    0.080703] Mountpoint-cache hash table entries: 1024 (order: 0, 4096 bytes, linear)
[    0.297571] ASID allocator using 9 bits (512 entries)
[    0.322001] rcu: Hierarchical SRCU implementation.
[    0.328738] rcu:     Max phase no-delay instances is 1000.
[    0.407713] smp: Bringing up secondary CPUs ...
[    0.761056] smp: Brought up 1 node, 4 CPUs
[    0.881888] devtmpfs: initialized
[    1.502438] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604462750000 ns
[    1.517298] futex hash table entries: 1024 (order: 4, 65536 bytes, linear)
[    1.903302] NET: Registered PF_NETLINK/PF_ROUTE protocol family
[    1.967673] DMA: preallocated 128 KiB GFP_KERNEL pool for atomic allocations
[    4.400822] pps_core: LinuxPPS API ver. 1 registered
[    4.405901] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>
[    4.423883] PTP clock support registered
[    4.463479] FPGA manager framework
[    4.632870] clocksource: Switched to clocksource riscv_clocksource
[    8.894151] NET: Registered PF_INET protocol family
[    8.966209] IP idents hash table entries: 2048 (order: 2, 16384 bytes, linear)
[    9.195962] tcp_listen_portaddr_hash hash table entries: 512 (order: 0, 4096 bytes, linear)
[    9.216777] Table-perturb hash table entries: 65536 (order: 6, 262144 bytes, linear)
[    9.236527] TCP established hash table entries: 1024 (order: 0, 4096 bytes, linear)
[    9.256715] TCP bind hash table entries: 1024 (order: 2, 16384 bytes, linear)
[    9.283659] TCP: Hash tables configured (established 1024 bind 1024)
[    9.336840] UDP hash table entries: 256 (order: 1, 8192 bytes, linear)
[    9.357005] UDP-Lite hash table entries: 256 (order: 1, 8192 bytes, linear)
[    9.645460] Unpacking initramfs...
[   10.223651] workingset: timestamp_bits=30 max_order=12 bucket_order=0
[   18.954019] io scheduler mq-deadline registered
[   18.972990] io scheduler kyber registered
[   20.033521] LiteX SoC Controller driver initialized
[   41.796930] Initramfs unpacking failed: invalid magic at start of compressed archive
[   49.912621] Freeing initrd memory: 8192K
[   61.923563] f0001000.serial: ttyLXU0 at MMIO 0x0 (irq = 0, base_baud = 0) is a liteuart
[   61.936669] printk: console [liteuart0] enabled
[   61.936669] printk: console [liteuart0] enabled
[   61.956959] printk: bootconsole [liteuart0] disabled
[   61.956959] printk: bootconsole [liteuart0] disabled
[   62.683697] i2c_dev: i2c /dev entries driver
[   63.137182] litex-mmc f0004800.mmc: LiteX MMC controller initialized.
[   63.804717] NET: Registered PF_INET6 protocol family
[   64.425385] mmc0: new SDXC card at address b368
[   64.795474] Segment Routing with IPv6
[   64.856904] In-situ OAM (IOAM) with IPv6
[   64.886988] sit: IPv6, IPv4 and MPLS over IPv4 tunneling driver
[   65.254812] NET: Registered PF_PACKET protocol family
[   65.605240] mmcblk0: mmc0:b368 NCard 58.2 GiB 
[   66.035890] Freeing unused kernel image (initmem) memory: 212K
[   66.055103] Kernel memory protection not selected by kernel config.
[   66.067736] Run /init as init process
[   66.192412]  mmcblk0: p1
Saving 256 bits of non-creditable seed for next boot
Starting syslogd: OK
Starting klogd: OK
Running sysctl: OK
Starting network: OK

Welcome to Buildroot
buildroot login: root
                   __   _
                  / /  (_)__  __ ____ __
                 / /__/ / _ \/ // /\ \ /
                /____/_/_//_/\_,_//_\_\
                      / _ \/ _ \
   __   _ __      _  _\___/_//_/         ___  _
  / /  (_) /____ | |/_/__| | / /____ __ / _ \(_)__ _____  __
 / /__/ / __/ -_)>  </___/ |/ / -_) \ // , _/ (_-</ __/ |/ /
/____/_/\__/\__/_/|_|____|___/\__/_\_\/_/|_/_/___/\__/|___/
                  / __/  |/  / _ \
                 _\ \/ /|_/ / ___/
                /___/_/  /_/_/
  32-bit RISC-V Linux running on LiteX / VexRiscv-SMP.

login[90]: root login on 'console'
cat /proc/root@buildroot:~# cat /proc/cpuinfo
processor   : 0
hart        : 0
isa     : rv32ima
mmu     : sv32
mvendorid   : 0x0
marchid     : 0x0
mimpid      : 0x0

processor   : 1
hart        : 1
isa     : rv32ima
mmu     : sv32
mvendorid   : 0x0
marchid     : 0x0
mimpid      : 0x0

processor   : 2
hart        : 2
isa     : rv32ima
mmu     : sv32
mvendorid   : 0x0
marchid     : 0x0
mimpid      : 0x0

processor   : 3
hart        : 3
isa     : rv32ima
mmu     : sv32
mvendorid   : 0x0
marchid     : 0x0
mimpid      : 0x0
Dolu1990 commented 1 year ago

Nice :)

Would it make sense to always set HZ_100?

Yes, i think you are right, that would be a more portable default.

Also, if possible avoid --with-wishbone-memory as it realy hit the memory bandwidth between the SoC and the SDRAM

The framebuffer is also probably starving data, i had that when for instance i was running digilent video at 50 Mhz, just got blackscreen. Not sure what is your actual resolution ?

stettberger commented 1 year ago

Currently, I have not changed the default settings of framebuffer at all. Therefore, I cannot tell about the resolution that the framebuffer has. In the end, I would be more than happy to have a 80x25 text terminal (as in former times with CGA and Hercules cards).

For the 100Hz: There is pull request #363

stettberger commented 1 year ago

Ok. So when using the framebuffer, the system seems to be memory starving on the ulx3s. However, If I enable the "video_terminal", I can synthesize a quad-core with HDMI out. And while it is working, I get some timing warning:

Warning: Max frequency for clock '$glbnet$ecp5pll1_clkout1': 97.14 MHz (FAIL at 125.00 MHz)
Info: Max frequency for clock '$glbnet$ecp5pll1_clkout0': 70.81 MHz (PASS at 25.00 MHz)
Info: Max frequency for clock '$glbnet$ecp5pll0_clkout0': 48.69 MHz (PASS at 40.00 MHz)

Info: Clock '$glbnet$ecp5pll0_clkout1' has no interior paths

Info: Max delay <async>                          -> posedge $glbnet$ecp5pll0_clkout0: 12.49 ns
Info: Max delay <async>                          -> posedge $glbnet$ecp5pll1_clkout0: 8.66 ns
Info: Max delay <async>                          -> posedge $glbnet$ecp5pll1_clkout1: 8.96 ns
Info: Max delay posedge $glbnet$ecp5pll0_clkout0 -> <async>                         : 5.25 ns
Info: Max delay posedge $glbnet$ecp5pll0_clkout0 -> posedge $glbnet$ecp5pll1_clkout0: 3.87 ns
Info: Max delay posedge $glbnet$ecp5pll0_clkout0 -> posedge $glbnet$ecp5pll1_clkout1: 4.16 ns
Info: Max delay posedge $glbnet$ecp5pll1_clkout0 -> posedge $glbnet$ecp5pll0_clkout0: 1.46 ns
Info: Max delay posedge $glbnet$ecp5pll1_clkout0 -> posedge $glbnet$ecp5pll1_clkout1: 1.24 ns
Info: Max delay posedge $glbnet$ecp5pll1_clkout1 -> posedge $glbnet$ecp5pll1_clkout0: 1.48 ns

It does not seem to be a problem, however, I'm not sure what it means that the pll1_clkout1 is less than 125 Mhz.

Further, the video_terminal is not to useful with Linux using the uart for its login shell.

My Next Step: I also think that it should be doable to modify "VideoTerminal" so that it (a) does not sniff the uart sink for its data, but that it (b) exposes the video and the font memory via wishbone. Thereby, I should become able to emulate a good old text-mode graphic card.

@Dolu1990 Would it make sense (in the multi-core mode) to (a) Disable framebuffer for the ULX3S Board (b) reduce the clock frequency?

Dolu1990 commented 1 year ago

Hi,

pll1_clkout

I think that is to drive the 640x480@75Hz

Further, the video_terminal is not to useful with Linux using the uart for its login shell.

See https://github.com/SpinalHDL/NaxSoftware/tree/main/debian_litex#boot-console

So console=tty1 in the linux bootcmd may fix it ?

If you want, you can try to get the USB host working. (there is a OHCI controller in litex)

Would it make sense (in the multi-core mode) to (a) Disable framebuffer for the ULX3S Board (b) reduce the clock frequency?

I'm not sure. There is so many possibility / use cases. I would say people need to customiz for their use case.