Closed cacona666 closed 2 years ago
PTAL - @kgugala
I got same problem.
It looks some primitives or attributes of primitive are not supported by current symbiflow.
Therefore, it seems that the following units cannot be synthsized currently.
To use symbiflow, I added some workarounds to remove these units.
diff --git a/make.py b/make.py
index 1d050a7..e5c486b 100755
--- a/make.py
+++ b/make.py
@@ -58,6 +58,10 @@ class AcornCLE215(Board):
# Arty support -------------------------------------------------------------------------------------
class Arty(Board):
+ soc_kwargs = {
+ "sys_clk_freq" : int(80e6), # Increase sys_clk_freq to 64MHz (48MHz default).
+ }
+
spiflash = S25FL128L(Codes.READ_1_1_1)
def __init__(self):
from litex_boards.targets import arty
@@ -67,7 +71,7 @@ class Arty(Board):
"ethernet",
# Storage
"spiflash",
- "sdcard",
+ #"sdcard",
# GPIOs
"leds",
"rgb_led",
@@ -76,10 +80,10 @@ class Arty(Board):
"spi",
"i2c",
# Monitoring
- "xadc",
+ #"xadc",
# 7-Series specific
"mmcm",
- "icap_bitstream",
+ #"icap_bitstream",
}, bitstream_ext=".bit")
class ArtyA7(Arty): pass
@@ -591,6 +595,9 @@ def main():
if "framebuffer" in board.soc_capabilities:
soc_kwargs.update(with_video_framebuffer=True)
+ if args.toolchain == "symbiflow":
+ soc_kwargs.update(with_jtagbone=False)
+
# SoC creation -----------------------------------------------------------------------------
soc = SoCLinux(board.soc_cls, **soc_kwargs)
board.platform = soc.platform
(I cannot run bitstream synthesized by symbiflow at 100MHz. This diff reduces sys_clock to 80MHz)
It would be good to log issues with SymbiFlow about which functionality needs to be added to make this work out of box.
The boards well supported by Symbiflow are probably listed in Symbiflow project. For designs with LiteX, the Digilent Arty is the one tested more regularly and recommended.
Hi there,
Thanks a lot for your work!
I tried to use symbiflow toolchain and I couldn't make it work. I am using current master branch revision for litex-boards and linux-on-litex-vexriscv.
When using --board=arty like this:
./make.py --board=arty --toolchain=symbiflow --build
I end up getting the following error:
When using --board=arty_a7 I get a similar one:
**ERROR: Cell $iopadmap$arty_a7.sdcard_cd of type \IBUF doesn't support the \SLEW attribute**
And when using the nexys4ddr it just tries to use Vivado toolchain:Symbiflow Xilinx 7 series examples include a 'Linux LiteX demo' example with "arty_100" target that builds correctly (haven't run them).
Question: Is this a known problem or I am doing something wrong? Question: I plan to use the "nexy4ddr" target. Will it be possible/easy to make it work with current board configuration? Question: Is it ok to use symbiflow or the recommendation is still to use Vivado for Litex?
Thanks!