Closed teisenbe closed 6 years ago
A bunch of the register access here didn't match STM's docs. The old code had a few bugs:
1) The EXTI4-15 handler would clear pending bits for interrupts 16-31. 2) GPIO interrupt configuration was very misindexed.
A bunch of the register access here didn't match STM's docs. The old code had a few bugs:
1) The EXTI4-15 handler would clear pending bits for interrupts 16-31. 2) GPIO interrupt configuration was very misindexed.