The triangle list may still be in the ARM's L1 or L2 cache when the FPGA starts to read it. Worse, even if we flush those caches, the triangles may still be in the memory controller's write queue. In fact there may be no way to guarantee that the FPGA can read what the ARM has written. We may be forced to use the HPS-FPGA bridge.
The triangle list may still be in the ARM's L1 or L2 cache when the FPGA starts to read it. Worse, even if we flush those caches, the triangles may still be in the memory controller's write queue. In fact there may be no way to guarantee that the FPGA can read what the ARM has written. We may be forced to use the HPS-FPGA bridge.