lkolbly / ripstop

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Simulation #8

Closed lkolbly closed 2 years ago

lkolbly commented 2 years ago

I'm reticent in general to have Ripstop-specific simulation, because it wouldn't support simulating verilog (and also because a bug in the simulator might mask a bug in the compiler), but I think it's necessary for two specific other features that we definitely do want: Unit tests and doc generation.

So we should have a way of simulating a Ripstop module. The output & API can be somewhat internal, but to start we can probably start with a command line wrapper that outputs VCD files (readable by GTK Wave). Simulation also requires that we specify inputs, and it might make sense to specify inputs & outputs as a CSV file because we have a very step-based time model that we can work with. Columns can be labelled with the variable, and rows represent time steps.

For example, this code:

module add3(bits<32> tag_in, bits<32> a, bits<32> b, bits<32> c) -> (bits<32> tag_out, bits<32> res) {
   bits<32> intermediate;
   intermediate[t] = a[t-1] + b[t-1];
   res[t] = intermediate[t-1] + c[t-2];
   tag_out[t] = tag_in[t-2];
}

could have an associated CSV file like:

tag_in,a,b,c,tag_out,res
0xdeadbeef,1,2,3,x,x
0x1234,15,21,34,x,x
0x5678,0,0,0,0xdeadbeef,6
x,x,x,x,0x1234,70
x,x,x,x,0x5678,0

(it's a bit unwieldy in plain text, look at it in a spreadsheet viewer. Alternatively, it might make sense to explore other possible formats, including making a format, that are easier to read/write in plain text. End users will ultimately be using these in source control)

Notice that the outputs of the module are actually specified as columns - this CSV forms a test. We should simulate the module, and verify that the actual outputs of the module match what is specified in the CSV.

Also notice the use of x in both the output and the input. In the output, it means simply "don't care." In the input, it also means "don't care," but this means that we need to be able to simulate three-value logic throughout the language. The truth table is the same except that in any operation where one of the operands is an x, the result will be x as well.