Closed seldridge closed 2 years ago
FIRRTL Dialect currently includes everything that Chisel can emit. This includes the behavioral memory statements:
firrtl.cmem
firrtl.smem
firrtl.memoryport
Add a pass that lowers these to firrtl.memory using the algorithms described in the following Scala FIRRTL Compiler (SFC) transforms:
firrtl.memory
CInferMDir
RemoveChirrtl
Roughly, this needs to figure out whether each firrtl.memoryport is a read, write, or readwrite port and what the enable line is.
If you are looking into how to handle "behavioral memories", are you going to try and address the issues with the current implementation?
This has been implemented
FIRRTL Dialect currently includes everything that Chisel can emit. This includes the behavioral memory statements:
firrtl.cmem
firrtl.smem
firrtl.memoryport
Add a pass that lowers these to
firrtl.memory
using the algorithms described in the following Scala FIRRTL Compiler (SFC) transforms:CInferMDir
RemoveChirrtl
Roughly, this needs to figure out whether each
firrtl.memoryport
is a read, write, or readwrite port and what the enable line is.