firrtl.passes.CheckFlows$WrongFlow: @[ComposableCache.scala 652:25]: [module ComposableCache] Expression mods_0.io.resp is used as a SinkFlow but can only be used as a SourceFlow.
MFC:
ComposableCache.scala:652:25: note: see current operation: "firrtl.connect"(%47624, %47873) : (!firrtl.bundle<ready flip: uint<1>, valid: uint<1>, bits: bundle<fail: uint<1>>>, !firrtl.bundle<ready flip: uint<1>, valid: uint<1>, bits: bundle<fail: uint<1>>>) -> ()
test.fir:100:15: note: the left-hand-side was defined here.
mods_0.io is invalid
in other words, SFC tells me that I messed up mods_0.io.resp while MFC seems to tell me that I messed up all of mods0.io
youngar
commented
2 years ago
error message improvement request
SFC:
MFC:
in other words, SFC tells me that I messed up
mods_0.io.respwhile MFC seems to tell me that I messed up all ofmods0.io