Closed mwachs5 closed 2 years ago
Thanks for filing a ticket about this.
I'd modify this slightly to say that we should add an option to control randomization to firtool
, e.g., -disable-register-randomization
. We can bridge the upstream annotation in chisel-circt
to map to this.
Scala FIRRTL Compiler supported annotations to control the emission of randomization code at the top of the file, which can be quite noisy. In particular the
CustomDefaultRegisterEmission.disableRandomization
flag andcase "disableMemRandomization" => CustomDefaultMemoryEmission(MemoryNoInit)
was useful when trying to emit instructive examples and documentation where the initialization code is huge and not exactly educational.See https://github.com/chipsalliance/firrtl/blob/b027eb466b033a0a9d229f19feb931ddb292a9fa/src/main/scala/firrtl/EmissionOption.scala#L15
other discussion here: https://discourse.llvm.org/t/how-to-disable-randomize-in-firtool-generated-sv/65990