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llvm / circt

Circuit IR Compilers and Tools
https://circt.org
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[ExportVerilog] Fix two state type emission of aggregate types #7189

Closed uenoku closed 1 week ago

uenoku commented 2 weeks ago

This PR fixes an issue that emitAsTwoStateType flag was not propagated for aggregate types.

This PR also fixes a bug that ctypes (int/shortint etc) are used as an inner type of packed types (e.g. int [2:0] is invalid) according to SV spec 6.8.

uenoku commented 1 week ago

Since this is small fix I'm going to merge. Post-commit review is welcomed!