Closed mingzheTerapines closed 1 day ago
Fix parser error like this. Parser will find type after the ":", while I naming parameter with "@typekind:name". So replace ":" with "_" will solve this problem.
@uenoku , SystemVerilog provides three elaboration-time constants: parameter, localparam, and specparam. Conversation should not lose these key words, so I added it at the firstplace, which won't duplicate with each other.
If I recall correctly, the idea is to have the MooreToCore lowering preserve the constants as hw.wire
such that they show up in simulations. It's pretty hacky. Ideally we'd do this with a dbg.variable
, but there isn't very good support for those in Arcilator and other CIRCT lowerings yet.