Vector related arith missing `nsw` on addition

[bcardosolopes]

If we look at how LLVM currently codegen for this, we get a add nsw instead of a plain add, see https://godbolt.org/z/xdevh38r8. There are probably other differences too.

_Originally posted by @bcardosolopes in https://github.com/llvm/clangir/pull/613#discussion_r1630329735_

[seven-mile]

I can repro this for just scalar arith, too. See this program. I guess we are missing the corresponding logic in ScalarExprEmitter. The lowering is correct however.

https://github.com/llvm/clangir/blob/76f748888056c3974910c7e6653c8ce22689e20f/clang/lib/CodeGen/CGExprScalar.cpp#L4096-L4111

[mingshi2333]

I checked and it seems Subop has already done this logic, so if no one else has done it, it can be assigned to me https://github.com/llvm/clangir/blob/9720c614b93406c6a08a04887958c2e0e3ad1632/clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp#L1317-L1338