Closed overmighty closed 4 weeks ago
@llvm/issue-subscribers-backend-x86
Author: OverMighty (overmighty)
Duplicate #104915, this version is just peeling out a layer of implementation detail
There are cases where Clang/LLVM 17 does not do this but 18 does: https://godbolt.org/z/3as5jeG46. But maybe LLVM 17 just added a DAG pattern for x86 that's not as reliable as the InstCombine change in LLVM 18, and both issues are caused by FABS
ending up being used and FABS
for f16
promoting the operand to f32
when AVX-512 FP16 is unavailable.
llvm/lib/Target/X86/X86ISelLowering.cpp has:
auto setF16Action = [&] (MVT VT, LegalizeAction Action) {
setOperationAction(ISD::FABS, VT, Action);
// ...
};
// ...
// Half type will be promoted by default.
setF16Action(MVT::f16, Promote);
There are cases where Clang/LLVM 17 does not do this but 18 does:
The DAG always did this (only as an optimization), depending on the old target hook hasBitPreservingFPLogic, which was removed in 09dd4d870e192da73594b713bb201859e5a09efb. The underlying promotion for fabs was always broken, just hidden by the optimization
https://godbolt.org/z/exb7PbjnK
C++ code:
IR:
Clang 16 output assembly with
-O3
:Clang 17 output assembly with
-O3
:Related: https://github.com/llvm/llvm-project/pull/104869#issuecomment-2297563670.
cc @arsenm @lntue