[LV] missed optimization for loop with condition

llvm / llvm-project

The LLVM Project is a collection of modular and reusable compiler and toolchain technologies.

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test: https://gcc.godbolt.org/z/zM5qfqnda

__attribute__((noinline)) void foo()
{
for (unsigned pass = 0; pass < pass_num; pass++) {
#pragma clang loop vectorize(assume_safety)
for(unsigned long i=0; i<translation_num; i++) {
for (int tid=0; tid<elements; tid++) {
 int xidx = x[pass][tid];
 if ( xidx < 0) {
  trans_sin_x[tid] = -sin_x[i][-xidx];
 } else {
  trans_sin_x[tid] = sin_x[i][xidx];
 }
}
}
}
}

gcc do sve vectorize, while llvm don't now, and record the llvm's assemble

.LBB0_3:
    add     x13, x13, #1
    cmp     x13, #100
    b.eq    .LBB0_1
.LBB0_4:
    madd    x14, x13, x11, x10
    mov     x15, xzr
    b       .LBB0_7
.LBB0_5:
    madd    x17, x13, x11, x10
    ldr     s0, [x17, x16, lsl #2]
.LBB0_6:
    str     s0, [x12, x15]
    add     x15, x15, #4
    cmp     x15, #4000
    b.eq    .LBB0_3
.LBB0_7:
    ldr     w16, [x9, x15]
    tbz     w16, #31, .LBB0_5
    neg     w16, w16
    ldr     s0, [x14, w16, uxtw #2]
    fneg    s0, s0
    b       .LBB0_6

.LBB0_3: ld1w { z0.s }, p0/z, [x10, x16, lsl #2] uunpkhi z1.d, z0.s cmpge p1.s, p0/z, z0.s, #0 cmplt p2.s, p0/z, z0.s, #0 uunpklo z2.d, z0.s subr z0.s, z0.s, #0 uunpkhi z3.d, z0.s lsl z1.d, z1.d, #2 uunpklo z0.d, z0.s punpkhi p3.h, p1.b lsl z2.d, z2.d, #2 punpklo p1.h, p1.b ld1w { z1.d }, p3/z, [x15, z1.d] punpkhi p3.h, p2.b lsl z3.d, z3.d, #2 lsl z0.d, z0.d, #2 ld1w { z3.d }, p3/z, [x15, z3.d] punpklo p3.h, p2.b ld1w { z0.d }, p3/z, [x15, z0.d] ld1w { z2.d }, p1/z, [x15, z2.d] uzp1 z0.s, z0.s, z3.s fneg z0.s, p0/m, z0.s uzp1 z1.s, z2.s, z1.s sel z0.s, p2, z0.s, z1.s st1w { z0.s }, p0, [x14, x16, lsl #2] incw x16 cmp x9, x16 b.ne .LBB0_3

llvm / llvm-project

[LV] missed optimization for loop with condition #106554