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Scheduler produces bogus machine code #12274

Open asl opened 12 years ago

asl commented 12 years ago
Bugzilla Link 11902
Version trunk
OS All
Attachments Testcase
CC @atrick,@stoklund

Extended Description

Consider the attached .ll file.

If one will feed it to llc -arm-enable-ehabi then one will see that the .vsave entry contains spurious s18 register added to the register list. This is because post-ra scheduler adds bogus s18 impdef operand to VSTMDDB_UPD. Adding -disable-post-ra fixes this problem.

I can surely ignore imp-def operands in the ARM unwinding stuff emitter. But I think this is a symptom of some bug inside the scheduler or some passes around (I must admit, I have another testcase which is fails w/o -disable-post-ra and passes otherwise, but I failed to reduce it yet since it's several KLOCs of heavy vector NEON code).

asl commented 11 years ago

Workaround implemented in r161301, though bug in scheduler does still exist.