Open topperc opened 6 years ago
We are currently preferring BLENDPS/BLENDPD for the X86ISD::MOVSS/MOVSD opcodes emitted from isel. We are also prefering blendps+xorps for X86::VZEXT_MOVL for vXi32/vXf32 types. For X86::VZEXT_MOVL with vXf64/vXi64 types we use MOVQ for the zeroing the upper bits.
Extended Description
There are no EVEX versions of VBLENDPS/VBLENDPD so when AVX512 is enabled we prefer EVEX VMOVSS/VMOVSD. This enables us to use the XMM16-XMM31 registers, but the BLEND instructions have better throughput and that may outweight the increased register freedom.