inline assembler for LDR neon register not working

[uncleasm]

The following code seems to compile with GCC

float32x4_t load_row_asm(float *src, int64_t stride_xm) {
   float32x4_t q0;
   asm("ldr %0, [%1, %2]" : "=&w"(q0) : "r"(src), "r"(stride_xm));
   return q0;
}

ldr v0, [x0, x1]

Clang OTOH produces an error: invalid operand for instruction

I'm familiar with other Neon register operations requiring prefixes, such as mul %0.8b, %0.8b, %0.8b, however there doesn't seem to a prefix to satisfy LDR / workaround the issue. asm("ldr q0, [%1, %2]" : "=&w"(q0) : "r"(src), "r"(stride_xm)); would compile, but it would not generally work as the target register would not be allocated by the compiler.

[llvmbot]

@llvm/issue-subscribers-backend-aarch64

[davemgreen]

Does %q0 work for you? As in: https://godbolt.org/z/rc5fE6fe9