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[BPF] Not recognizing and generating store imm instructions #62109

Open 4ar0nma0 opened 1 year ago

4ar0nma0 commented 1 year ago

E.g. :

     716:   7a 0a f8 ff 00 00 00 00 <unknown>

        ...

     720:   62 0a 8c ff 02 02 00 00 <unknown>

Where these instructions were defined in: https://docs.kernel.org/bpf/instruction-set.html

As:

BPF_MEM | <size> | BPF_ST : *(size *) (dst + offset) = imm32

0x62    stw [dst+off], imm    (uint32_t ) (dst + off) = imm
0x6a    sth [dst+off], imm    (uint16_t ) (dst + off) = imm
0x72    stb [dst+off], imm    (uint8_t ) (dst + off) = imm
0x7a    stdw [dst+off], imm   (uint64_t ) (dst + off) = imm

LLVM version:

$ llvm-objdump --version
LLVM (http://llvm.org/):
  LLVM version 17.0.0git
  Optimized build.

Also it is worth noting that seems llc is not generating such instructions even if ir clearly indicated that it is something like:

store i32 0, ptr %2, align 4
inclyc commented 11 months ago

This has already been implemented in https://reviews.llvm.org/D140804, but not enabled by default. You may need to add -mcpu=v4 flag to enable this feature.