thesamesam
commented
1 year ago cc @mgorny
Open thesamesam opened 1 year ago
thesamesam
commented
1 year ago cc @mgorny
llvmbot
commented
1 year ago @llvm/issue-subscribers-backend-risc-v
topperc
commented
1 year ago I don't have a 32-bit arm system to test this on. Can you try to debug it?
The relevant code starts in performMemPairCombine in RISCVISelLowering.cpp. If it hits any of the return SDValue(), that means it couldn't match the pattern. If you can figure out where it bailed out that would be great.
matoro
commented
10 months ago FYI, you can run and test 32-bit arm code in a chroot on a 64-bit arm system.
Tested on 17 rc4 and observed this plus one new failure. Full log:
dqdopi4.log
********************
Failed Tests (2):
LLVM :: CodeGen/RISCV/attributes.ll
LLVM :: CodeGen/RISCV/xtheadmempair.ll
Testing Time: 1103.99s
Skipped : 35
Unsupported : 982
Passed : 53864
Expectedly Failed: 162
Failed : 2
ncopa
commented
9 months ago Same thing happens with llvm17.0.2 on alpine linux armv7 (with musl libc) and armhf (armv6).
ncopa
commented
9 months ago I don't have a 32-bit arm system to test this on. Can you try to debug it?
The relevant code starts in performMemPairCombine in RISCVISelLowering.cpp. If it hits any of the
return SDValue(), that means it couldn't match the pattern. If you can figure out where it bailed out that would be great.
I can try help debug. How can I run that specific test in gdb, so I can set a breakpoint on SDValue?
ncopa
commented
9 months ago I git bisected the CodeGen/RISCV/attributes.ll test failure which landed on bbb58a2302c65b73943e00f2def3384a68177a7f. This is also the commit that introduces llvm/test/CodeGen/RISCV/xtheadmempair.ll.
topperc
commented
9 months ago I don't have a 32-bit arm system to test this on. Can you try to debug it?
The relevant code starts in performMemPairCombine in RISCVISelLowering.cpp. If it hits any of the
return SDValue(), that means it couldn't match the pattern. If you can figure out where it bailed out that would be great.I can try help debug. How can I run that specific test in gdb, so I can set a breakpoint on SDValue?
llvm-lit -v llvm/test/CodeGen/RISCV/xtheadmempair.ll hould print more information and you should be able to find the command line for llc.
ncopa
commented
9 months ago $ ./build/bin/llvm-lit -v ./llvm/test/CodeGen/RISCV/xtheadmempair.ll
-- Testing: 1 tests, 1 workers --
FAIL: LLVM :: CodeGen/RISCV/xtheadmempair.ll (1 of 1)
******************** TEST 'LLVM :: CodeGen/RISCV/xtheadmempair.ll' FAILED ********************
Script:
--
: 'RUN: at line 2'; /home/ncopa/src/llvm-project/build/bin/llc -mtriple=riscv32 -mattr=+xtheadmempair -verify-machineinstrs < /home/ncopa/src/llvm-project/llvm/test/CodeGen/RISCV/xtheadmempair.ll | /home/ncopa/src/llvm-project/build/bin/FileCheck /home/ncopa/src/llvm-project/llvm/test/CodeGen/RISCV/xtheadmempair.ll -check-prefix=RV32XTHEADMEMPAIR
: 'RUN: at line 4'; /home/ncopa/src/llvm-project/build/bin/llc -mtriple=riscv64 -mattr=+xtheadmempair -verify-machineinstrs < /home/ncopa/src/llvm-project/llvm/test/CodeGen/RISCV/xtheadmempair.ll | /home/ncopa/src/llvm-project/build/bin/FileCheck /home/ncopa/src/llvm-project/llvm/test/CodeGen/RISCV/xtheadmempair.ll -check-prefix=RV64XTHEADMEMPAIR
--
Exit Code: 2
Command Output (stderr):
--
PLEASE submit a bug report to https://github.com/llvm/llvm-project/issues/ and include the crash backtrace.
Stack dump:
0. Program arguments: /home/ncopa/src/llvm-project/build/bin/llc -mtriple=riscv32 -mattr=+xtheadmempair -verify-machineinstrs
1. Running pass 'Function Pass Manager' on module '<stdin>'.
2. Running pass 'Expand large div/rem' on function '@lwd'
FileCheck error: '<stdin>' is empty.
FileCheck command line: /home/ncopa/src/llvm-project/build/bin/FileCheck /home/ncopa/src/llvm-project/llvm/test/CodeGen/RISCV/xtheadmempair.ll -check-prefix=RV32XTHEADMEMPAIR
--
********************
********************
Failed Tests (1):
LLVM :: CodeGen/RISCV/xtheadmempair.ll
Testing Time: 0.04s
Failed: 1gdb backtrace:
$ gdb /home/ncopa/src/llvm-project/build/bin/llc #-mtriple=riscv32 -mattr=+xtheadmempair -verify-machineinstrs
GNU gdb (GDB) 13.2
Copyright (C) 2023 Free Software Foundation, Inc.
License GPLv3+: GNU GPL version 3 or later <http://gnu.org/licenses/gpl.html>
This is free software: you are free to change and redistribute it.
There is NO WARRANTY, to the extent permitted by law.
Type "show copying" and "show warranty" for details.
This GDB was configured as "armv7-alpine-linux-musleabihf".
Type "show configuration" for configuration details.
For bug reporting instructions, please see:
<https://www.gnu.org/software/gdb/bugs/>.
Find the GDB manual and other documentation resources online at:
<http://www.gnu.org/software/gdb/documentation/>.
For help, type "help".
Type "apropos word" to search for commands related to "word"...
Reading symbols from /home/ncopa/src/llvm-project/build/bin/llc...
(gdb) run -mtriple=riscv32 -mattr=+xtheadmempair -verify-machineinstrs < /home/ncopa/src/llvm-project/llvm/test/CodeGen/RISCV/xtheadmempair.ll
Starting program: /home/ncopa/src/llvm-project/build/bin/llc -mtriple=riscv32 -mattr=+xtheadmempair -verify-machineinstrs < /home/ncopa/src/llvm-project/llvm/test/CodeGen/RISCV/xtheadmempair.ll
.text
.attribute 4, 16
.attribute 5, "rv32i2p0_xtheadmempair1p0"
.file "<stdin>"
Program received signal SIGSEGV, Segmentation fault.
0x014377f8 in llvm::RISCVTargetLowering::RISCVTargetLowering(llvm::TargetMachine const&, llvm::RISCVSubtarget const&) ()
(gdb) bt
#0 0x014377f8 in llvm::RISCVTargetLowering::RISCVTargetLowering(llvm::TargetMachine const&, llvm::RISCVSubtarget const&) ()
#1 0x013c61ca in llvm::RISCVSubtarget::RISCVSubtarget(llvm::Triple const&, llvm::StringRef, llvm::StringRef, llvm::StringRef, llvm::StringRef, unsigned int, unsigned int, llvm::TargetMachine const&) ()
#2 0x013c95f4 in llvm::RISCVTargetMachine::getSubtargetImpl(llvm::Function const&) const ()
#3 0x01d0857a in (anonymous namespace)::ExpandLargeDivRemLegacyPass::runOnFunction(llvm::Function&) ()
#4 0x0213fc3e in llvm::FPPassManager::runOnFunction(llvm::Function&) ()
#5 0x0213fef8 in llvm::FPPassManager::runOnModule(llvm::Module&) ()
#6 0x02140526 in llvm::legacy::PassManagerImpl::run(llvm::Module&) ()
#7 0x008f8034 in compileModule(char**, llvm::LLVMContext&) ()
#8 0x008644ca in main ()I originally tries to build it with debugging symbols but it got errors about emomry exhaused or similar (during linking?). I believe it runs out of addressable memory on 32 bit.
dtcxzyw
commented
9 months ago I originally tries to build it with debugging symbols but it got errors about emomry exhaused or similar (during linking?). I believe it runs out of addressable memory on 32 bit.
You can try with -DLLVM_PARALLEL_LINK_JOBS=1 or set up a swap space.
ncopa
commented
9 months ago I originally tries to build it with debugging symbols but it got errors about emomry exhaused or similar (during linking?). I believe it runs out of addressable memory on 32 bit.
You can try with
-DLLVM_PARALLEL_LINK_JOBS=1or set up a swap space.
I still get final link failed: memory exhausted. This is a 32 bit container on an aarch64 host with 256G ram, so I don't think adding swap will help. Problem is that there is not enough address space.
ncopa
commented
9 months ago How do I pass -g1 as the debug level?
ncopa
commented
9 months ago I was able to build it with debugging symbols by only building RISCV target. But then it would no longer segfault. (test still fails).
So I checked out current main (commit ) and built it again as "Release". The segfault came back. Here is disassembly:
(gdb) disas $pc-60,+120
Dump of assembler code from 0x7715a6 to 0x77161e:
0x007715a6 <_ZN4llvm19RISCVTargetLoweringC2ERKNS_13TargetMachineERKNS_14RISCVSubtargetE+5618>: subs r7, #44 @ 0x2c
0x007715a8 <_ZN4llvm19RISCVTargetLoweringC2ERKNS_13TargetMachineERKNS_14RISCVSubtargetE+5620>: ldrb.w r3, [r8, #3895] @ 0xf37
0x007715ac <_ZN4llvm19RISCVTargetLoweringC2ERKNS_13TargetMachineERKNS_14RISCVSubtargetE+5624>: orr.w r3, r3, #64 @ 0x40
0x007715b0 <_ZN4llvm19RISCVTargetLoweringC2ERKNS_13TargetMachineERKNS_14RISCVSubtargetE+5628>: strb.w r3, [r8, #3895] @ 0xf37
0x007715b4 <_ZN4llvm19RISCVTargetLoweringC2ERKNS_13TargetMachineERKNS_14RISCVSubtargetE+5632>: ldrb.w r3, [r0, #313] @ 0x139
0x007715b8 <_ZN4llvm19RISCVTargetLoweringC2ERKNS_13TargetMachineERKNS_14RISCVSubtargetE+5636>: cbz r3, 0x7715f2 <_ZN4llvm19RISCVTargetLoweringC2ERKNS_13TargetMachineERKNS_14RISCVSubtargetE+5694>
0x007715ba <_ZN4llvm19RISCVTargetLoweringC2ERKNS_13TargetMachineERKNS_14RISCVSubtargetE+5638>: movs r2, #1
0x007715bc <_ZN4llvm19RISCVTargetLoweringC2ERKNS_13TargetMachineERKNS_14RISCVSubtargetE+5640>: ldr r3, [sp, #84] @ 0x54
0x007715be <_ZN4llvm19RISCVTargetLoweringC2ERKNS_13TargetMachineERKNS_14RISCVSubtargetE+5642>: ldr r1, [sp, #88] @ 0x58
0x007715c0 <_ZN4llvm19RISCVTargetLoweringC2ERKNS_13TargetMachineERKNS_14RISCVSubtargetE+5644>: add.w r5, r11, r3, asr #3
0x007715c4 <_ZN4llvm19RISCVTargetLoweringC2ERKNS_13TargetMachineERKNS_14RISCVSubtargetE+5648>: add.w r5, r5, #211968 @ 0x33c00
0x007715c8 <_ZN4llvm19RISCVTargetLoweringC2ERKNS_13TargetMachineERKNS_14RISCVSubtargetE+5652>: ldrb.w r6, [r5, #790] @ 0x316
0x007715cc <_ZN4llvm19RISCVTargetLoweringC2ERKNS_13TargetMachineERKNS_14RISCVSubtargetE+5656>: and.w r3, r3, #7
0x007715d0 <_ZN4llvm19RISCVTargetLoweringC2ERKNS_13TargetMachineERKNS_14RISCVSubtargetE+5660>: lsl.w r3, r2, r3
0x007715d4 <_ZN4llvm19RISCVTargetLoweringC2ERKNS_13TargetMachineERKNS_14RISCVSubtargetE+5664>: add.w r4, r11, r1, asr #3
0x007715d8 <_ZN4llvm19RISCVTargetLoweringC2ERKNS_13TargetMachineERKNS_14RISCVSubtargetE+5668>: orrs r3, r6
0x007715da <_ZN4llvm19RISCVTargetLoweringC2ERKNS_13TargetMachineERKNS_14RISCVSubtargetE+5670>: add.w r4, r4, #211968 @ 0x33c00
0x007715de <_ZN4llvm19RISCVTargetLoweringC2ERKNS_13TargetMachineERKNS_14RISCVSubtargetE+5674>: strb.w r3, [r5, #790] @ 0x316
=> 0x007715e2 <_ZN4llvm19RISCVTargetLoweringC2ERKNS_13TargetMachineERKNS_14RISCVSubtargetE+5678>: ldrb.w r3, [r4, #790] @ 0x316
0x007715e6 <_ZN4llvm19RISCVTargetLoweringC2ERKNS_13TargetMachineERKNS_14RISCVSubtargetE+5682>: and.w r1, r1, #7
0x007715ea <_ZN4llvm19RISCVTargetLoweringC2ERKNS_13TargetMachineERKNS_14RISCVSubtargetE+5686>: lsls r2, r1
0x007715ec <_ZN4llvm19RISCVTargetLoweringC2ERKNS_13TargetMachineERKNS_14RISCVSubtargetE+5688>: orrs r3, r2
0x007715ee <_ZN4llvm19RISCVTargetLoweringC2ERKNS_13TargetMachineERKNS_14RISCVSubtargetE+5690>: strb.w r3, [r4, #790] @ 0x316
0x007715f2 <_ZN4llvm19RISCVTargetLoweringC2ERKNS_13TargetMachineERKNS_14RISCVSubtargetE+5694>: bl 0x6d7c54 <_ZNK4llvm14RISCVSubtarget27useRVVForFixedLengthVectorsEv>
0x007715f6 <_ZN4llvm19RISCVTargetLoweringC2ERKNS_13TargetMachineERKNS_14RISCVSubtargetE+5698>: cbz r0, 0x771604 <_ZN4llvm19RISCVTargetLoweringC2ERKNS_13TargetMachineERKNS_14RISCVSubtargetE+5712>
0x007715f8 <_ZN4llvm19RISCVTargetLoweringC2ERKNS_13TargetMachineERKNS_14RISCVSubtargetE+5700>: ldrb.w r3, [r8, #3889] @ 0xf31
0x007715fc <_ZN4llvm19RISCVTargetLoweringC2ERKNS_13TargetMachineERKNS_14RISCVSubtargetE+5704>: orr.w r3, r3, #8
0x00771600 <_ZN4llvm19RISCVTargetLoweringC2ERKNS_13TargetMachineERKNS_14RISCVSubtargetE+5708>: strb.w r3, [r8, #3889] @ 0xf31
0x00771604 <_ZN4llvm19RISCVTargetLoweringC2ERKNS_13TargetMachineERKNS_14RISCVSubtargetE+5712>: movs r0, #1
0x00771606 <_ZN4llvm19RISCVTargetLoweringC2ERKNS_13TargetMachineERKNS_14RISCVSubtargetE+5714>: ldr.w r2, [pc, #1276] @ 0x771b04 <_ZN4llvm19RISCVTargetLoweringC2ERKNS_13TargetMachineERKNS_14RISCVSubtargetE+6992>
0x0077160a <_ZN4llvm19RISCVTargetLoweringC2ERKNS_13TargetMachineERKNS_14RISCVSubtargetE+5718>: ldr.w r3, [pc, #1276] @ 0x771b08 <_ZN4llvm19RISCVTargetLoweringC2ERKNS_13TargetMachineERKNS_14RISCVSubtargetE+6996>
0x0077160e <_ZN4llvm19RISCVTargetLoweringC2ERKNS_13TargetMachineERKNS_14RISCVSubtargetE+5722>: add r2, pc
0x00771610 <_ZN4llvm19RISCVTargetLoweringC2ERKNS_13TargetMachineERKNS_14RISCVSubtargetE+5724>: add r3, pc
0x00771612 <_ZN4llvm19RISCVTargetLoweringC2ERKNS_13TargetMachineERKNS_14RISCVSubtargetE+5726>: add.w r1, r11, #212992 @ 0x34000
0x00771616 <_ZN4llvm19RISCVTargetLoweringC2ERKNS_13TargetMachineERKNS_14RISCVSubtargetE+5730>: strd r2, r3, [r1, #948] @ 0x3b4
0x0077161a <_ZN4llvm19RISCVTargetLoweringC2ERKNS_13TargetMachineERKNS_14RISCVSubtargetE+5734>: ldr r3, [sp, #12]
0x0077161c <_ZN4llvm19RISCVTargetLoweringC2ERKNS_13TargetMachineERKNS_14RISCVSubtargetE+5736>: ldr.w r2, [pc, #1260] @ 0x771b0c <_ZN4llvm19RISCVTargetLoweringC2ERKNS_13TargetMachineERKNS_14RISCVSubtargetE+7000>
End of assembler dump.
(gdb) bt
#0 0x007715e2 in llvm::RISCVTargetLowering::RISCVTargetLowering(llvm::TargetMachine const&, llvm::RISCVSubtarget const&) ()
#1 0x006d851a in llvm::RISCVSubtarget::RISCVSubtarget(llvm::Triple const&, llvm::StringRef, llvm::StringRef, llvm::StringRef, llvm::StringRef, unsigned int, unsigned int, llvm::TargetMachine const&) ()
#2 0x006dc4e8 in llvm::RISCVTargetMachine::getSubtargetImpl(llvm::Function const&) const ()
#3 0x00a2d6f8 in (anonymous namespace)::ExpandLargeDivRemLegacyPass::runOnFunction(llvm::Function&) ()
#4 0x00ee2996 in llvm::FPPassManager::runOnFunction(llvm::Function&) ()
#5 0x00ee2c0c in llvm::FPPassManager::runOnModule(llvm::Module&) ()
#6 0x00ee323e in llvm::legacy::PassManagerImpl::run(llvm::Module&) ()
#7 0x006a894e in compileModule(char**, llvm::LLVMContext&) ()
#8 0x00657fbe in main ()Are you able to get a line number in llvm::RISCVTargetLowering::RISCVTargetLowering? That's a big function.
topperc
commented
9 months ago Reading the disassembly carefully and comparing to the source, I think its the XTHeadMemPair part of this code
if (Subtarget.hasVInstructions())
setTargetDAGCombine({ISD::FCOPYSIGN, ISD::MGATHER, ISD::MSCATTER,
ISD::VP_GATHER, ISD::VP_SCATTER, ISD::SRA, ISD::SRL,
ISD::SHL, ISD::STORE, ISD::SPLAT_VECTOR,
ISD::BUILD_VECTOR, ISD::CONCAT_VECTORS});
if (Subtarget.hasVendorXTHeadMemPair())
setTargetDAGCombine({ISD::LOAD, ISD::STORE});
if (Subtarget.useRVVForFixedLengthVectors())
setTargetDAGCombine(ISD::BITCAST); @ncopa can you dump the registers?
ncopa
commented
9 months ago looks like it is r4+790 that causes the segfault. and it is not mapped to anything.
(gdb) info reg
r0 0xf7c405b0 4156818864
r1 0x1fcfeb8 33357496
r2 0x1 1
r3 0x1 1
r4 0xf806e41f 4161201183
r5 0xf7c74448 4157031496
r6 0x0 0
r7 0x1726 5926
r8 0xf7c73848 4157028424
r9 0xf7c405b0 4156818864
r10 0x0 0
r11 0xf7c40848 4156819528
r12 0x4 4
sp 0xfffeed80 0xfffeed80
lr 0x77146f 7804015
pc 0x7715e2 0x7715e2 <llvm::RISCVTargetLowering::RISCVTargetLowering(llvm::TargetMachine const&, llvm::RISCVSubtarget const&)+5678>
cpsr 0x30 48
fpscr 0x0 0
tpidruro <unavailable>
(gdb) p $r4 + 790
$1 = 4161201973
(gdb) x/4bx $r4+790
0xf806e735: Cannot access memory at address 0xf806e735
(gdb) info proc map
process 10128
Mapped address spaces:
Start Addr End Addr Size Offset Perms objfile
0x400000 0x215a000 0x1d5a000 0x0 r-xp /home/ncopa/src/llvm-project/build-release/bin/llc
0x215a000 0x218f000 0x35000 0x1d5a000 r--p /home/ncopa/src/llvm-project/build-release/bin/llc
0x218f000 0x2192000 0x3000 0x1d8f000 rw-p /home/ncopa/src/llvm-project/build-release/bin/llc
0x2192000 0x21ba000 0x28000 0x0 rw-p [heap]
0x21ba000 0x21bb000 0x1000 0x0 ---p [heap]
0x21bb000 0x21bd000 0x2000 0x0 rw-p [heap]
0xf7c40000 0xf7cf9000 0xb9000 0x0 rw-p
0xf7cf9000 0xf7d01000 0x8000 0x0 r-xp /usr/lib/libgcc_s.so.1
0xf7d01000 0xf7d02000 0x1000 0x7000 r--p /usr/lib/libgcc_s.so.1
0xf7d02000 0xf7d03000 0x1000 0x8000 rw-p /usr/lib/libgcc_s.so.1
0xf7d03000 0xf7eda000 0x1d7000 0x0 r-xp /usr/lib/libstdc++.so.6.0.32
0xf7eda000 0xf7ee1000 0x7000 0x1d7000 r--p /usr/lib/libstdc++.so.6.0.32
0xf7ee1000 0xf7ee2000 0x1000 0x1de000 rw-p /usr/lib/libstdc++.so.6.0.32
0xf7ee2000 0xf7ee4000 0x2000 0x0 rw-p
0xf7ee4000 0xf7f58000 0x74000 0x0 r-xp /usr/lib/libzstd.so.1.5.5
0xf7f58000 0xf7f59000 0x1000 0x73000 r--p /usr/lib/libzstd.so.1.5.5
0xf7f59000 0xf7f5a000 0x1000 0x74000 rw-p /usr/lib/libzstd.so.1.5.5
0xf7f5a000 0xf7f69000 0xf000 0x0 r-xp /lib/libz.so.1.3
0xf7f69000 0xf7f6a000 0x1000 0xe000 r--p /lib/libz.so.1.3
0xf7f6a000 0xf7f6b000 0x1000 0xf000 rw-p /lib/libz.so.1.3
0xf7f6b000 0xf7f6c000 0x1000 0x0 r-xp [sigpage]
0xf7f6c000 0xf7fed000 0x81000 0x0 r-xp /lib/ld-musl-armhf.so.1
0xf7fed000 0xf7fef000 0x2000 0x80000 rw-p /lib/ld-musl-armhf.so.1
0xf7fef000 0xf7ff0000 0x1000 0x0 rw-p
0xfffcf000 0xffff0000 0x21000 0x0 rw-p [stack]
0xffff0000 0xffff1000 0x1000 0x0 r-xp [vectors]Reading the disassembly carefully and comparing to the source, I think its the XTHeadMemPair part of this code
if (Subtarget.hasVInstructions()) setTargetDAGCombine({ISD::FCOPYSIGN, ISD::MGATHER, ISD::MSCATTER, ISD::VP_GATHER, ISD::VP_SCATTER, ISD::SRA, ISD::SRL, ISD::SHL, ISD::STORE, ISD::SPLAT_VECTOR, ISD::BUILD_VECTOR, ISD::CONCAT_VECTORS}); if (Subtarget.hasVendorXTHeadMemPair()) setTargetDAGCombine({ISD::LOAD, ISD::STORE}); if (Subtarget.useRVVForFixedLengthVectors()) setTargetDAGCombine(ISD::BITCAST);
That corresponds with the change introducing the issue. https://github.com/llvm/llvm-project/commit/bbb58a2302c65b73943e00f2def3384a68177a7f#diff-b836770407029aa900efa9e60c57f4d71add22b49ebe56c4b1a1effe403c8af8R1067
topperc
commented
9 months ago The value in r1 looks way off. I think it should be the opcode for ISD::STORE.
I think this code is supposed be reading the 2 values out of the {ISD::LOAD, ISD::STORE} initializer_list.
0x007715bc <_ZN4llvm19RISCVTargetLoweringC2ERKNS_13TargetMachineERKNS_14RISCVSubtargetE+5640>: ldr r3, [sp, #84] @ 0x54
0x007715be <_ZN4llvm19RISCVTargetLoweringC2ERKNS_13TargetMachineERKNS_14RISCVSubtargetE+5642>: ldr r1, [sp, #88] @ 0x58The value in r3 has been overwritten by the time the crash happens. But r1 hasn't.
awilfox
commented
9 months ago No longer segfaulting when built debug + only RISC-V target makes me think one of two things:
-O0?topperc
commented
9 months ago Does changing the code to
if (Subtarget.hasVendorXTHeadMemPair()) {
setTargetDAGCombine(ISD::LOAD);
setTargetDAGCombine(ISD::STORE);
}fix the sissue
ncopa
commented
9 months ago Does changing the code to
if (Subtarget.hasVendorXTHeadMemPair()) { setTargetDAGCombine(ISD::LOAD); setTargetDAGCombine(ISD::STORE); }fix the sissue
-- Testing: 1 tests, 1 workers --
PASS: LLVM :: CodeGen/RISCV/xtheadmempair.ll (1 of 1)
Testing Time: 0.09s
Passed: 1
...
-- Testing: 1 tests, 1 workers --
PASS: LLVM :: CodeGen/RISCV/attributes.ll (1 of 1)
Testing Time: 1.65s
Passed: 1Yes it does indeed!
ncopa
commented
9 months ago Maybe try building with debug and two or three targets (smaller ones like Sparc and M68K maybe? Probably not X86…)
I did this, and the test fails, even if it does not segfault. So I added a breakpoint and stepped through it.
(gdb) n
1320 setTargetDAGCombine({ISD::LOAD, ISD::STORE});
(gdb) list
1315 setTargetDAGCombine({ISD::FCOPYSIGN, ISD::MGATHER, ISD::MSCATTER,
1316 ISD::VP_GATHER, ISD::VP_SCATTER, ISD::SRA, ISD::SRL,
1317 ISD::SHL, ISD::STORE, ISD::SPLAT_VECTOR,
1318 ISD::BUILD_VECTOR, ISD::CONCAT_VECTORS});
1319 if (Subtarget.hasVendorXTHeadMemPair())
1320 setTargetDAGCombine({ISD::LOAD, ISD::STORE});
1321 if (Subtarget.useRVVForFixedLengthVectors())
1322 setTargetDAGCombine(ISD::BITCAST);
1323
1324 setLibcallName(RTLIB::FPEXT_F16_F32, "__extendhfsf2");
(gdb) info reg
r0 0xc4 196
r1 0x10 16 r2 0xf7c744a0 4157031584
r3 0x1 1
r4 0xfffeeea4 4294897316
r5 0xf7c405f0 4156818928
r6 0x1 1
r7 0x1c75db8 29842872
r8 0x0 0
r9 0x0 0
r10 0xf7c40888 4156819592
r11 0xfffeee7c 4294897276
r12 0xfffeee9c 4294897308
sp 0xfffeede8 0xfffeede8
lr 0x766c3b 7760955
pc 0x76748e 0x76748e <llvm::RISCVTargetLowering::RISCVTargetLowering(llvm::TargetMachine const&, llvm::RISCVSubtarget const&)+5498>
cpsr 0x20000030 536870960
fpscr 0x0 0
tpidruro <unavailable>
(gdb) disas $pc-40,+80
Dump of assembler code from 0x767466 to 0x7674b6:
0x00767466 <_ZN4llvm19RISCVTargetLoweringC2ERKNS_13TargetMachineERKNS_14RISCVSubtargetE+5458>: b.w 0x767e06 <_ZN4llvm19RISCVTargetLoweringC2ERKNS_13TargetMachineERKNS_14RISCVSubt
argetE+7922>
0x0076746a <_ZN4llvm19RISCVTargetLoweringC2ERKNS_13TargetMachineERKNS_14RISCVSubtargetE+5462>: add.w r2, r10, #208896 @ 0x33000
0x0076746e <_ZN4llvm19RISCVTargetLoweringC2ERKNS_13TargetMachineERKNS_14RISCVSubtargetE+5466>: ldrb.w r3, [r2, #3885] @ 0xf2d
0x00767472 <_ZN4llvm19RISCVTargetLoweringC2ERKNS_13TargetMachineERKNS_14RISCVSubtargetE+5470>: orr.w r3, r3, #32
0x00767476 <_ZN4llvm19RISCVTargetLoweringC2ERKNS_13TargetMachineERKNS_14RISCVSubtargetE+5474>: strb.w r3, [r2, #3885] @ 0xf2d
0x0076747a <_ZN4llvm19RISCVTargetLoweringC2ERKNS_13TargetMachineERKNS_14RISCVSubtargetE+5478>: b.n 0x766cfc <_ZN4llvm19RISCVTargetLoweringC2ERKNS_13TargetMachineERKNS_14RISCVSubt
argetE+3560>
0x0076747c <_ZN4llvm19RISCVTargetLoweringC2ERKNS_13TargetMachineERKNS_14RISCVSubtargetE+5480>: add.w r2, r10, #208896 @ 0x33000
0x00767480 <_ZN4llvm19RISCVTargetLoweringC2ERKNS_13TargetMachineERKNS_14RISCVSubtargetE+5484>: ldrb.w r3, [r2, #3889] @ 0xf31
0x00767484 <_ZN4llvm19RISCVTargetLoweringC2ERKNS_13TargetMachineERKNS_14RISCVSubtargetE+5488>: orr.w r3, r3, #8
0x00767488 <_ZN4llvm19RISCVTargetLoweringC2ERKNS_13TargetMachineERKNS_14RISCVSubtargetE+5492>: strb.w r3, [r2, #3889] @ 0xf31
0x0076748c <_ZN4llvm19RISCVTargetLoweringC2ERKNS_13TargetMachineERKNS_14RISCVSubtargetE+5496>: b.n 0x766d86 <_ZN4llvm19RISCVTargetLoweringC2ERKNS_13TargetMachineERKNS_14RISCVSubt
argetE+3698>
=> 0x0076748e <_ZN4llvm19RISCVTargetLoweringC2ERKNS_13TargetMachineERKNS_14RISCVSubtargetE+5498>: movs r2, #1
0x00767490 <_ZN4llvm19RISCVTargetLoweringC2ERKNS_13TargetMachineERKNS_14RISCVSubtargetE+5500>: ldr r3, [sp, #148] @ 0x94
0x00767492 <_ZN4llvm19RISCVTargetLoweringC2ERKNS_13TargetMachineERKNS_14RISCVSubtargetE+5502>: ldr r4, [sp, #152] @ 0x98
0x00767494 <_ZN4llvm19RISCVTargetLoweringC2ERKNS_13TargetMachineERKNS_14RISCVSubtargetE+5504>: add.w r0, r10, r3, asr #3
0x00767498 <_ZN4llvm19RISCVTargetLoweringC2ERKNS_13TargetMachineERKNS_14RISCVSubtargetE+5508>: add.w r0, r0, #211968 @ 0x33c00
0x0076749c <_ZN4llvm19RISCVTargetLoweringC2ERKNS_13TargetMachineERKNS_14RISCVSubtargetE+5512>: ldrb.w r6, [r0, #790] @ 0x316
0x007674a0 <_ZN4llvm19RISCVTargetLoweringC2ERKNS_13TargetMachineERKNS_14RISCVSubtargetE+5516>: and.w r3, r3, #7
0x007674a4 <_ZN4llvm19RISCVTargetLoweringC2ERKNS_13TargetMachineERKNS_14RISCVSubtargetE+5520>: lsl.w r3, r2, r3
0x007674a8 <_ZN4llvm19RISCVTargetLoweringC2ERKNS_13TargetMachineERKNS_14RISCVSubtargetE+5524>: add.w r1, r10, r4, asr #3
0x007674ac <_ZN4llvm19RISCVTargetLoweringC2ERKNS_13TargetMachineERKNS_14RISCVSubtargetE+5528>: orrs r3, r6
0x007674ae <_ZN4llvm19RISCVTargetLoweringC2ERKNS_13TargetMachineERKNS_14RISCVSubtargetE+5530>: add.w r1, r1, #211968 @ 0x33c00
0x007674b2 <_ZN4llvm19RISCVTargetLoweringC2ERKNS_13TargetMachineERKNS_14RISCVSubtargetE+5534>: strb.w r3, [r0, #790] @ 0x316
End of assembler dump.
(gdb) step
0x0076748e in llvm::TargetLoweringBase::setTargetDAGCombine (NTs=..., this=<optimized out>) at /home/ncopa/src/llvm-project/llvm/include/llvm/CodeGen/TargetLowering.h:2616
2616 TargetDAGCombineArray[NT >> 3] |= 1 << (NT & 7);
(gdb) info reg
r0 0xc4 196
r1 0x10 16
r2 0xf7c744a0 4157031584
r3 0x1 1
r4 0xfffeeea4 4294897316
r5 0xf7c405f0 4156818928
r6 0x1 1
r7 0x1c75db8 29842872
r8 0x0 0
r9 0x0 0
r10 0xf7c40888 4156819592
r11 0xfffeee7c 4294897276
r12 0xfffeee9c 4294897308
sp 0xfffeede8 0xfffeede8
lr 0x766c3b 7760955
pc 0x76748e 0x76748e <llvm::RISCVTargetLowering::RISCVTargetLowering(llvm::TargetMachine const&, llvm::RISCVSubtarget const&)+5498>
cpsr 0x20000030 536870960
fpscr 0x0 0
tpidruro <unavailable>
(gdb) disas $pc-20,+80
Dump of assembler code from 0x76747a to 0x7674ca:
0x0076747a <_ZN4llvm19RISCVTargetLoweringC2ERKNS_13TargetMachineERKNS_14RISCVSubtargetE+5478>: b.n 0x766cfc <_ZN4llvm19RISCVTargetLoweringC2ERKNS_13TargetMachineERKNS_14RISCVSubtargetE+3560>
0x0076747c <_ZN4llvm19RISCVTargetLoweringC2ERKNS_13TargetMachineERKNS_14RISCVSubtargetE+5480>: add.w r2, r10, #208896 @ 0x33000
0x00767480 <_ZN4llvm19RISCVTargetLoweringC2ERKNS_13TargetMachineERKNS_14RISCVSubtargetE+5484>: ldrb.w r3, [r2, #3889] @ 0xf31
0x00767484 <_ZN4llvm19RISCVTargetLoweringC2ERKNS_13TargetMachineERKNS_14RISCVSubtargetE+5488>: orr.w r3, r3, #8
0x00767488 <_ZN4llvm19RISCVTargetLoweringC2ERKNS_13TargetMachineERKNS_14RISCVSubtargetE+5492>: strb.w r3, [r2, #3889] @ 0xf31
0x0076748c <_ZN4llvm19RISCVTargetLoweringC2ERKNS_13TargetMachineERKNS_14RISCVSubtargetE+5496>: b.n 0x766d86 <_ZN4llvm19RISCVTargetLoweringC2ERKNS_13TargetMachineERKNS_14RISCVSubtargetE+3698>
=> 0x0076748e <_ZN4llvm19RISCVTargetLoweringC2ERKNS_13TargetMachineERKNS_14RISCVSubtargetE+5498>: movs r2, #1
0x00767490 <_ZN4llvm19RISCVTargetLoweringC2ERKNS_13TargetMachineERKNS_14RISCVSubtargetE+5500>: ldr r3, [sp, #148] @ 0x94
0x00767492 <_ZN4llvm19RISCVTargetLoweringC2ERKNS_13TargetMachineERKNS_14RISCVSubtargetE+5502>: ldr r4, [sp, #152] @ 0x98
0x00767494 <_ZN4llvm19RISCVTargetLoweringC2ERKNS_13TargetMachineERKNS_14RISCVSubtargetE+5504>: add.w r0, r10, r3, asr #3
0x00767498 <_ZN4llvm19RISCVTargetLoweringC2ERKNS_13TargetMachineERKNS_14RISCVSubtargetE+5508>: add.w r0, r0, #211968 @ 0x33c00
0x0076749c <_ZN4llvm19RISCVTargetLoweringC2ERKNS_13TargetMachineERKNS_14RISCVSubtargetE+5512>: ldrb.w r6, [r0, #790] @ 0x316
0x007674a0 <_ZN4llvm19RISCVTargetLoweringC2ERKNS_13TargetMachineERKNS_14RISCVSubtargetE+5516>: and.w r3, r3, #7
0x007674a4 <_ZN4llvm19RISCVTargetLoweringC2ERKNS_13TargetMachineERKNS_14RISCVSubtargetE+5520>: lsl.w r3, r2, r3
0x007674a8 <_ZN4llvm19RISCVTargetLoweringC2ERKNS_13TargetMachineERKNS_14RISCVSubtargetE+5524>: add.w r1, r10, r4, asr #3
0x007674ac <_ZN4llvm19RISCVTargetLoweringC2ERKNS_13TargetMachineERKNS_14RISCVSubtargetE+5528>: orrs r3, r6
0x007674ae <_ZN4llvm19RISCVTargetLoweringC2ERKNS_13TargetMachineERKNS_14RISCVSubtargetE+5530>: add.w r1, r1, #211968 @ 0x33c00
0x007674b2 <_ZN4llvm19RISCVTargetLoweringC2ERKNS_13TargetMachineERKNS_14RISCVSubtargetE+5534>: strb.w r3, [r0, #790] @ 0x316
0x007674b6 <_ZN4llvm19RISCVTargetLoweringC2ERKNS_13TargetMachineERKNS_14RISCVSubtargetE+5538>: ldrb.w r3, [r1, #790] @ 0x316
0x007674ba <_ZN4llvm19RISCVTargetLoweringC2ERKNS_13TargetMachineERKNS_14RISCVSubtargetE+5542>: and.w r4, r4, #7
0x007674be <_ZN4llvm19RISCVTargetLoweringC2ERKNS_13TargetMachineERKNS_14RISCVSubtargetE+5546>: lsls r2, r4
0x007674c0 <_ZN4llvm19RISCVTargetLoweringC2ERKNS_13TargetMachineERKNS_14RISCVSubtargetE+5548>: orrs r3, r2
0x007674c2 <_ZN4llvm19RISCVTargetLoweringC2ERKNS_13TargetMachineERKNS_14RISCVSubtargetE+5550>: strb.w r3, [r1, #790] @ 0x316
0x007674c6 <_ZN4llvm19RISCVTargetLoweringC2ERKNS_13TargetMachineERKNS_14RISCVSubtargetE+5554>: b.n 0x766d7a <_ZN4llvm19RISCVTargetLoweringC2ERKNS_13TargetMachineERKNS_14RISCVSubtargetE+3686>
0x007674c8 <_ZN4llvm19RISCVTargetLoweringC2ERKNS_13TargetMachineERKNS_14RISCVSubtargetE+5556>: mov r7, r11
End of assembler dump.
(gdb) step
llvm::RISCVTargetLowering::RISCVTargetLowering (this=this@entry=0xf7c40888, TM=<error reading variable: Could not find type for operation>,
STI=<error reading variable: Could not find type for operation>) at /home/ncopa/src/llvm-project/llvm/include/llvm/CodeGen/TargetLowering.h:2614
2614 for (auto NT : NTs) {
(gdb) list
2609
2610 /// Targets should invoke this method for each target independent node that
2611 /// they want to provide a custom DAG combiner for by implementing the
2612 /// PerformDAGCombine virtual method.
2613 void setTargetDAGCombine(ArrayRef<ISD::NodeType> NTs) {
2614 for (auto NT : NTs) {
2615 assert(unsigned(NT >> 3) < std::size(TargetDAGCombineArray));
2616 TargetDAGCombineArray[NT >> 3] |= 1 << (NT & 7);
2617 }
2618 }
(gdb) info reg
r0 0xf7c7448d 4157031565
r1 0xf7c7448d 4157031565
r2 0x40 64
r3 0xe0 224
r4 0x6 6
r5 0xf7c405f0 4156818928
r6 0xe0 224
r7 0x1c75db8 29842872
r8 0x0 0
r9 0x0 0
r10 0xf7c40888 4156819592
r11 0xfffeee7c 4294897276
r12 0xfffeee9c 4294897308
sp 0xfffeede8 0xfffeede8
lr 0x766c3b 7760955
pc 0x7674c6 0x7674c6 <llvm::RISCVTargetLowering::RISCVTargetLowering(llvm::TargetMachine const&, llvm::RISCVSubtarget const&)+5554>
cpsr 0x30 48
fpscr 0x0 0
tpidruro <unavailable>
(gdb) disas $pc-20,+80
Dump of assembler code from 0x7674b2 to 0x767502:
0x007674b2 <_ZN4llvm19RISCVTargetLoweringC2ERKNS_13TargetMachineERKNS_14RISCVSubtargetE+5534>: strb.w r3, [r0, #790] @ 0x316
0x007674b6 <_ZN4llvm19RISCVTargetLoweringC2ERKNS_13TargetMachineERKNS_14RISCVSubtargetE+5538>: ldrb.w r3, [r1, #790] @ 0x316
0x007674ba <_ZN4llvm19RISCVTargetLoweringC2ERKNS_13TargetMachineERKNS_14RISCVSubtargetE+5542>: and.w r4, r4, #7
0x007674be <_ZN4llvm19RISCVTargetLoweringC2ERKNS_13TargetMachineERKNS_14RISCVSubtargetE+5546>: lsls r2, r4
0x007674c0 <_ZN4llvm19RISCVTargetLoweringC2ERKNS_13TargetMachineERKNS_14RISCVSubtargetE+5548>: orrs r3, r2
0x007674c2 <_ZN4llvm19RISCVTargetLoweringC2ERKNS_13TargetMachineERKNS_14RISCVSubtargetE+5550>: strb.w r3, [r1, #790] @ 0x316
=> 0x007674c6 <_ZN4llvm19RISCVTargetLoweringC2ERKNS_13TargetMachineERKNS_14RISCVSubtargetE+5554>: b.n 0x766d7a <_ZN4llvm19RISCVTargetLoweringC2ERKNS_13TargetMachineERKNS_14RISCVSubtargetE+3686>
0x007674c8 <_ZN4llvm19RISCVTargetLoweringC2ERKNS_13TargetMachineERKNS_14RISCVSubtargetE+5556>: mov r7, r11
0x007674ca <_ZN4llvm19RISCVTargetLoweringC2ERKNS_13TargetMachineERKNS_14RISCVSubtargetE+5558>: mov r12, r11
0x007674cc <_ZN4llvm19RISCVTargetLoweringC2ERKNS_13TargetMachineERKNS_14RISCVSubtargetE+5560>: mov.w lr, #1
0x007674d0 <_ZN4llvm19RISCVTargetLoweringC2ERKNS_13TargetMachineERKNS_14RISCVSubtargetE+5564>: ldr r4, [pc, #960] @ (0x767894 <_ZN4llvm19RISCVTargetLoweringC2ERKNS_13TargetMachineERKNS_14RISCVSubtargetE+6528>)
0x007674d2 <_ZN4llvm19RISCVTargetLoweringC2ERKNS_13TargetMachineERKNS_14RISCVSubtargetE+5566>: add r6, sp, #196 @ 0xc4
0x007674d4 <_ZN4llvm19RISCVTargetLoweringC2ERKNS_13TargetMachineERKNS_14RISCVSubtargetE+5568>: add r4, pc
0x007674d6 <_ZN4llvm19RISCVTargetLoweringC2ERKNS_13TargetMachineERKNS_14RISCVSubtargetE+5570>: add.w r4, r4, #1080 @ 0x438
0x007674da <_ZN4llvm19RISCVTargetLoweringC2ERKNS_13TargetMachineERKNS_14RISCVSubtargetE+5574>: ldmia r4!, {r0, r1, r2, r3}
0x007674dc <_ZN4llvm19RISCVTargetLoweringC2ERKNS_13TargetMachineERKNS_14RISCVSubtargetE+5576>: stmia r7!, {r0, r1, r2, r3}
0x007674de <_ZN4llvm19RISCVTargetLoweringC2ERKNS_13TargetMachineERKNS_14RISCVSubtargetE+5578>: ldmia r4!, {r0, r1, r2, r3}
0x007674e0 <_ZN4llvm19RISCVTargetLoweringC2ERKNS_13TargetMachineERKNS_14RISCVSubtargetE+5580>: stmia r7!, {r0, r1, r2, r3}
0x007674e2 <_ZN4llvm19RISCVTargetLoweringC2ERKNS_13TargetMachineERKNS_14RISCVSubtargetE+5582>: ldmia.w r4, {r0, r1, r2, r3}
0x007674e6 <_ZN4llvm19RISCVTargetLoweringC2ERKNS_13TargetMachineERKNS_14RISCVSubtargetE+5586>: stmia.w r7, {r0, r1, r2, r3}
0x007674ea <_ZN4llvm19RISCVTargetLoweringC2ERKNS_13TargetMachineERKNS_14RISCVSubtargetE+5590>: ldr.w r3, [r12], #4
0x007674ee <_ZN4llvm19RISCVTargetLoweringC2ERKNS_13TargetMachineERKNS_14RISCVSubtargetE+5594>: add.w r2, r10, r3, asr #3
0x007674f2 <_ZN4llvm19RISCVTargetLoweringC2ERKNS_13TargetMachineERKNS_14RISCVSubtargetE+5598>: add.w r2, r2, #211968 @ 0x33c00
0x007674f6 <_ZN4llvm19RISCVTargetLoweringC2ERKNS_13TargetMachineERKNS_14RISCVSubtargetE+5602>: ldrb.w r1, [r2, #790] @ 0x316
0x007674fa <_ZN4llvm19RISCVTargetLoweringC2ERKNS_13TargetMachineERKNS_14RISCVSubtargetE+5606>: and.w r3, r3, #7
0x007674fe <_ZN4llvm19RISCVTargetLoweringC2ERKNS_13TargetMachineERKNS_14RISCVSubtargetE+5610>: lsl.w r3, lr, r3
End of assembler dump.
(gdb) step
1321 if (Subtarget.useRVVForFixedLengthVectors())
(gdb) info reg
r0 0xf7c7448d 4157031565
r1 0xf7c7448d 4157031565
r2 0x40 64
r3 0xe0 224
r4 0x6 6
r5 0xf7c405f0 4156818928
r6 0xe0 224
r7 0x1c75db8 29842872
r8 0x0 0
r9 0x0 0
r10 0xf7c40888 4156819592
r11 0xfffeee7c 4294897276
r12 0xfffeee9c 4294897308
sp 0xfffeede8 0xfffeede8
lr 0x766c3b 7760955
pc 0x766d7a 0x766d7a <llvm::RISCVTargetLowering::RISCVTargetLowering(llvm::TargetMachine const&, llvm::RISCVSubtarget const&)+3686>
cpsr 0x30 48
fpscr 0x0 0
tpidruro <unavailable>
(gdb) disas $pc-20,+80
Dump of assembler code from 0x766d66 to 0x766db6:
0x00766d66 <_ZN4llvm19RISCVTargetLoweringC2ERKNS_13TargetMachineERKNS_14RISCVSubtargetE+3666>: ldrb.w r3, [r5, #276] @ 0x114
0x00766d6a <_ZN4llvm19RISCVTargetLoweringC2ERKNS_13TargetMachineERKNS_14RISCVSubtargetE+3670>: cmp r3, #0
0x00766d6c <_ZN4llvm19RISCVTargetLoweringC2ERKNS_13TargetMachineERKNS_14RISCVSubtargetE+3672>: bne.w 0x7674c8 <_ZN4llvm19RISCVTargetLoweringC2ERKNS_13TargetMachineERKNS_14RISCVSubtargetE+5556>
0x00766d70 <_ZN4llvm19RISCVTargetLoweringC2ERKNS_13TargetMachineERKNS_14RISCVSubtargetE+3676>: ldrb.w r3, [r5, #313] @ 0x139
0x00766d74 <_ZN4llvm19RISCVTargetLoweringC2ERKNS_13TargetMachineERKNS_14RISCVSubtargetE+3680>: cmp r3, #0
0x00766d76 <_ZN4llvm19RISCVTargetLoweringC2ERKNS_13TargetMachineERKNS_14RISCVSubtargetE+3682>: bne.w 0x76748e <_ZN4llvm19RISCVTargetLoweringC2ERKNS_13TargetMachineERKNS_14RISCVSubtargetE+5498>
=> 0x00766d7a <_ZN4llvm19RISCVTargetLoweringC2ERKNS_13TargetMachineERKNS_14RISCVSubtargetE+3686>: mov r0, r5
0x00766d7c <_ZN4llvm19RISCVTargetLoweringC2ERKNS_13TargetMachineERKNS_14RISCVSubtargetE+3688>: bl 0x6e7bc4 <_ZNK4llvm14RISCVSubtarget27useRVVForFixedLengthVectorsEv>
0x00766d80 <_ZN4llvm19RISCVTargetLoweringC2ERKNS_13TargetMachineERKNS_14RISCVSubtargetE+3692>: cmp r0, #0
0x00766d82 <_ZN4llvm19RISCVTargetLoweringC2ERKNS_13TargetMachineERKNS_14RISCVSubtargetE+3694>: bne.w 0x76747c <_ZN4llvm19RISCVTargetLoweringC2ERKNS_13TargetMachineERKNS_14RISCVSubtargetE+5480>
0x00766d86 <_ZN4llvm19RISCVTargetLoweringC2ERKNS_13TargetMachineERKNS_14RISCVSubtargetE+3698>: movs r0, #1
0x00766d88 <_ZN4llvm19RISCVTargetLoweringC2ERKNS_13TargetMachineERKNS_14RISCVSubtargetE+3700>: ldr.w r2, [pc, #2728] @ 0x767834 <_ZN4llvm19RISCVTargetLoweringC2ERKNS_13TargetMachineERKNS_14RISCVSubtargetE+6432>
0x00766d8c <_ZN4llvm19RISCVTargetLoweringC2ERKNS_13TargetMachineERKNS_14RISCVSubtargetE+3704>: ldr.w r3, [pc, #2728] @ 0x767838 <_ZN4llvm19RISCVTargetLoweringC2ERKNS_13TargetMachineERKNS_14RISCVSubtargetE+6436>
0x00766d90 <_ZN4llvm19RISCVTargetLoweringC2ERKNS_13TargetMachineERKNS_14RISCVSubtargetE+3708>: add r2, pc
0x00766d92 <_ZN4llvm19RISCVTargetLoweringC2ERKNS_13TargetMachineERKNS_14RISCVSubtargetE+3710>: add r3, pc
0x00766d94 <_ZN4llvm19RISCVTargetLoweringC2ERKNS_13TargetMachineERKNS_14RISCVSubtargetE+3712>: add.w r1, r10, #212992 @ 0x34000
0x00766d98 <_ZN4llvm19RISCVTargetLoweringC2ERKNS_13TargetMachineERKNS_14RISCVSubtargetE+3716>: strd r2, r3, [r1, #948] @ 0x3b4
0x00766d9c <_ZN4llvm19RISCVTargetLoweringC2ERKNS_13TargetMachineERKNS_14RISCVSubtargetE+3720>: ldr r3, [sp, #12]
0x00766d9e <_ZN4llvm19RISCVTargetLoweringC2ERKNS_13TargetMachineERKNS_14RISCVSubtargetE+3722>: ldr.w r2, [pc, #2716] @ 0x76783c <_ZN4llvm19RISCVTargetLoweringC2ERKNS_13TargetMachineERKNS_14RISCVSubtargetE+6440>
0x00766da2 <_ZN4llvm19RISCVTargetLoweringC2ERKNS_13TargetMachineERKNS_14RISCVSubtargetE+3726>: strb.w r0, [r3, #3610] @ 0xe1a
0x00766da6 <_ZN4llvm19RISCVTargetLoweringC2ERKNS_13TargetMachineERKNS_14RISCVSubtargetE+3730>: ldr.w r3, [pc, #2712] @ 0x767840 <_ZN4llvm19RISCVTargetLoweringC2ERKNS_13TargetMachineERKNS_14RISCVSubtargetE+6444>
0x00766daa <_ZN4llvm19RISCVTargetLoweringC2ERKNS_13TargetMachineERKNS_14RISCVSubtargetE+3734>: add r2, pc
0x00766dac <_ZN4llvm19RISCVTargetLoweringC2ERKNS_13TargetMachineERKNS_14RISCVSubtargetE+3736>: ldr r3, [r2, r3]
0x00766dae <_ZN4llvm19RISCVTargetLoweringC2ERKNS_13TargetMachineERKNS_14RISCVSubtargetE+3738>: ldr r2, [r3, #0]
0x00766db0 <_ZN4llvm19RISCVTargetLoweringC2ERKNS_13TargetMachineERKNS_14RISCVSubtargetE+3740>: ldr r3, [sp, #204] @ 0xcc
0x00766db2 <_ZN4llvm19RISCVTargetLoweringC2ERKNS_13TargetMachineERKNS_14RISCVSubtargetE+3742>: eors r2, r3
0x00766db4 <_ZN4llvm19RISCVTargetLoweringC2ERKNS_13TargetMachineERKNS_14RISCVSubtargetE+3744>: mov.w r3, #0
End of assembler dump.I hope that helps.
ncopa
commented
9 months ago I also tried to build with gcc (Alpine 11.2.1_git20220219) 11.2.1 20220219 , gcc (Alpine 13.1.1_git20230722) 13.1.1 20230722 and Alpine clang version 16.0.6. It did not make any difference.
ncopa
commented
4 months ago Just changing the order also makes the test pass.
diff --git a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
index 08678a859ae2..670f1422e758 100644
--- a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+++ b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
@@ -1424,7 +1424,8 @@ RISCVTargetLowering::RISCVTargetLowering(const TargetMachine &TM,
ISD::EXPERIMENTAL_VP_REVERSE, ISD::MUL,
ISD::INSERT_VECTOR_ELT, ISD::ABS});
if (Subtarget.hasVendorXTHeadMemPair())
- setTargetDAGCombine({ISD::LOAD, ISD::STORE});
+ setTargetDAGCombine({ISD::STORE, ISD::LOAD});
+
if (Subtarget.useRVVForFixedLengthVectors())
setTargetDAGCombine(ISD::BITCAST);
This also fails on 64-bit mips, so it's not inherently a 32-bit issue.
The
CodeGen/RISCV/xtheadmempair.lltest seems to fail on 32-bit Arm (tested at commit 0be1fbac2a7797399c0970e3f4033288036b65f6):