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[AMDGPU][AsmParser] Refine parsing instructions #62629

Open kosarev opened 1 year ago

kosarev commented 1 year ago

This is an umbrella ticket for the work on refining the assembler-related parts of the backend and common LLVM infrastructure. Includes elimination of workarounds, turning custom code into TableGen definitions, simplifications and fixing minor defects found during the work.

32f6b6bff5cd [AMDGPU][AsmParser] Refine parsing SDWA operands. 5114843983b6 [AMDGPU][AsmParser] Refine SMRD offset definitions. 32f46ef09f88 [AMDGPU][AsmParser][NFC] Refine immediate operand definitions. b06e5ad8a659 [AMDGPU][AsmParser][NFC] Simplify parsing cache policies. 905fa15d84a6 [AMDGPU][AsmParser] Distinguish literal and modifier SMEM offsets. dbbab71b7637 [AMDGPU][NFC] Eliminate the u32imm operand definition. f0f8ae7596c4 [AMDGPU][AsmParser] Fix matching immediate literals. 3d6b108a87cc [AMDGPU] Remove the unused u8imm operand definition. ce1aae4d547a [AMDGPU][AsmParser][NFC] Refine defining single-bit custom operands. 99761276059c [AMDGPU][AsmParser][NFC] Refine defining i8- and i16-typed custom operands. 2d945ef864ee [AMDGPU][NFC] Rename GFX10A16 operands. 0a6dc9a8168c [AMDGPU][AsmParser] Refine parsing cache policy modifiers. 536b8c537787 [AMDGPU][AsmParser] Remove the now-unused OptionalOperand structure. fce7a7aa9f04 [AMDGPU][AsmParser] Refine parsing instruction operands. 926acd2bb55d (arcpatch-D137638) [AMDGPU][AsmParser] Remove extra checks on missing instruction modifiers. af6b1f797f94 [AsmParser] Match mandatory operands following optional operands.

llvmbot commented 1 year ago

@llvm/issue-subscribers-backend-amdgpu