[AArch64] Cannot select `AArch64ISD::SRAD_MERGE_OP1` for `srem` with vector of -1's

HazyFish commented 1 year ago

Description

When enabling sve feature on AArch64, the following code crashes with LLVM ERROR: Cannot select: t25: nxv16i8 = AArch64ISD::SRAD_MERGE_OP1 t24, t21, TargetConstant:i32<0>.

This problem is similar to a previously fixed issue #59647 but with different cause.

Minimal Reproduction

https://godbolt.org/z/1jqa7eqK6

Code

define void @test(ptr %0) {
  %V1 = load <8 x i8>, ptr %0
  %V2 = srem <8 x i8> %V1, <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>
  store <8 x i8> %V2, ptr %0
  ret void
}

Stack Trace

LLVM ERROR: Cannot select: t25: nxv16i8 = AArch64ISD::SRAD_MERGE_OP1 t24, t21, TargetConstant:i32<0>
  t24: nxv16i1 = AArch64ISD::PTRUE TargetConstant:i32<8>
    t23: i32 = TargetConstant<8>
  t21: nxv16i8 = insert_subvector undef:nxv16i8, t5, Constant:i64<0>
    t20: nxv16i8 = undef
    t5: v8i8,ch = load<(load (s64) from %ir.0)> t0, t2, undef:i64
      t2: i64,ch = CopyFromReg t0, Register:i64 %0
        t1: i64 = Register %0
      t4: i64 = undef
    t19: i64 = Constant<0>
  t22: i32 = TargetConstant<0>
In function: test
PLEASE submit a bug report to https://github.com/llvm/llvm-project/issues/ and include the crash backtrace.
Stack dump:
0.  Program arguments: /opt/compiler-explorer/clang-assertions-trunk/bin/llc -o /app/output.s -x86-asm-syntax=intel -mtriple=aarch64 -mattr=+v9a <source>
1.  Running pass 'Function Pass Manager' on module '<source>'.
2.  Running pass 'AArch64 Instruction Selection' on function '@test'
 #0 0x0000557c07b7a15f llvm::sys::PrintStackTrace(llvm::raw_ostream&, int) (/opt/compiler-explorer/clang-assertions-trunk/bin/llc+0x354b15f)
 #1 0x0000557c07b778b4 SignalHandler(int) Signals.cpp:0:0
 #2 0x00007faa7e7ba420 __restore_rt (/lib/x86_64-linux-gnu/libpthread.so.0+0x14420)
 #3 0x00007faa7e28700b raise (/lib/x86_64-linux-gnu/libc.so.6+0x4300b)
 #4 0x00007faa7e266859 abort (/lib/x86_64-linux-gnu/libc.so.6+0x22859)
 #5 0x0000557c04e09a66 llvm::RISCVISAInfo::updateImplication() (.cold) RISCVISAInfo.cpp:0:0
 #6 0x0000557c0793702d llvm::SelectionDAGISel::CannotYetSelect(llvm::SDNode*) (/opt/compiler-explorer/clang-assertions-trunk/bin/llc+0x330802d)
 #7 0x0000557c07938f6a llvm::SelectionDAGISel::SelectCodeCommon(llvm::SDNode*, unsigned char const*, unsigned int) (/opt/compiler-explorer/clang-assertions-trunk/bin/llc+0x3309f6a)
 #8 0x0000557c05175f0b (anonymous namespace)::AArch64DAGToDAGISel::Select(llvm::SDNode*) AArch64ISelDAGToDAG.cpp:0:0
 #9 0x0000557c07933630 llvm::SelectionDAGISel::DoInstructionSelection() (/opt/compiler-explorer/clang-assertions-trunk/bin/llc+0x3304630)
#10 0x0000557c07940e44 llvm::SelectionDAGISel::CodeGenAndEmitDAG() (/opt/compiler-explorer/clang-assertions-trunk/bin/llc+0x3311e44)
#11 0x0000557c079444c8 llvm::SelectionDAGISel::SelectAllBasicBlocks(llvm::Function const&) (/opt/compiler-explorer/clang-assertions-trunk/bin/llc+0x33154c8)
#12 0x0000557c07946192 llvm::SelectionDAGISel::runOnMachineFunction(llvm::MachineFunction&) (.part.0) SelectionDAGISel.cpp:0:0
#13 0x0000557c06e196ce llvm::MachineFunctionPass::runOnFunction(llvm::Function&) (.part.0) MachineFunctionPass.cpp:0:0
#14 0x0000557c073b37f1 llvm::FPPassManager::runOnFunction(llvm::Function&) (/opt/compiler-explorer/clang-assertions-trunk/bin/llc+0x2d847f1)
#15 0x0000557c073b3a39 llvm::FPPassManager::runOnModule(llvm::Module&) (/opt/compiler-explorer/clang-assertions-trunk/bin/llc+0x2d84a39)
#16 0x0000557c073b42b2 llvm::legacy::PassManagerImpl::run(llvm::Module&) (/opt/compiler-explorer/clang-assertions-trunk/bin/llc+0x2d852b2)
#17 0x0000557c04ec6634 compileModule(char**, llvm::LLVMContext&) llc.cpp:0:0
#18 0x0000557c04e0ef06 main (/opt/compiler-explorer/clang-assertions-trunk/bin/llc+0x7dff06)
#19 0x00007faa7e268083 __libc_start_main (/lib/x86_64-linux-gnu/libc.so.6+0x24083)
#20 0x0000557c04ebca1e _start (/opt/compiler-explorer/clang-assertions-trunk/bin/llc+0x88da1e)
Program terminated with signal: SIGSEGV
Compiler returned: 139

HazyFish commented 1 year ago

@DataCorrupted

llvmbot commented 1 year ago

@llvm/issue-subscribers-backend-aarch64

DataCorrupted commented 7 months ago

Reproduction https://godbolt.org/z/TzvYj99fo

Scope This only happens when sve is included, with srem a constant vector of -1. This happens for upstream and LLVM 15-17.

Cause A direct cause is in AArch64TargetLowering::LowerFixedLengthVectorIntDivideToSVE, Log2_64(SplatVal) created a potential division by zero(log(1) == 0). Similar for AArch64TargetLowering::LowerDIV.

https://github.com/llvm/llvm-project/blob/dba2a75e9c7ef81fe84774ba5eee5e67e01d801a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp#L25956-L25959

However, this bug won't be triggered on vector of 1s or scalar 1 or -1 for the following reason:

In DAGCombiner::visitSDIVLike, any divide by vector of 1s or scalar 1 or -1 is already lowered. But a vector of -1s failed to get lowered because isConstantOrConstantVector(Inexact) is false. Inexact comes from vxi32 splat 16 - vxi16 splat 0. The weird effect is the bitwidth of element is 16, but the APInt extracted from the elements have bitwidth of 32. With clause Const->getAPIntValue().getBitWidth() != BitWidth, Inexact is not considered a Constant Vector. Why was this clause there when you commit it?

https://github.com/llvm/llvm-project/blob/dba2a75e9c7ef81fe84774ba5eee5e67e01d801a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp#L4825-L4832

Fixes An immediate fix would be to add a guard at AArch64TargetLowering::LowerFixedLengthVectorIntDivideToSVE to avoid any 1 or -1s. Fixing isConstantOrConstantVector should also be possible, but I need some help on that.

llvm / llvm-project