Open antiagainst opened 1 year ago
@llvm/issue-subscribers-mlir-spirv
Author: Lei Zhang (antiagainst)
Hi!
This issue may be a good introductory issue for people new to working on LLVM. If you would like to work on this issue, your first steps are:
1) In the comments of the issue, request for it to be assigned to you.
2) Fix the issue locally.
3) Run the test suite locally.
3.1) Remember that the subdirectories under test/
create fine-grained testing targets, so you can
e.g. use make check-clang-ast
to only run Clang's AST tests.
4) Create a Git commit.
5) Run git clang-format HEAD~1
to format your changes.
6) Open a pull request to the upstream repository on GitHub.
6.1) Detailed instructions can be found here.
If you have any further questions about this issue, don't hesitate to ask via a comment on this Github issue.
@llvm/issue-subscribers-good-first-issue
Author: Lei Zhang (antiagainst)
Hi. I would like to work on this. I'll try to take ⚙ D98396 [mlir] Remove mlir-cuda-runner as reference.
Hi @bhaskar1001101, sorry I missed your reply previously. Are you still interested to push this forward? If so I'll assign you to the issue. :)
Hello, I am new to LLVM and would like to work on this. @antiagainst , can you please assign me this issue.
@bhaskar1001101 and @Sh0g0-1758, you both have shown interest, so I assigned both of you. Can you work together on this?
To be clear, the idea is to remove mlir-vulkan-runner
, moving the logic inside mlir-cpu-runner
(like CUDA did) and then renaming mlir-cpu-runner
to just mlir-runner
.
Yeah. Note that I've marked this as good first issue but it's a relative large effort than normal, and may need some reading and understanding of mlir runners and vulkan specficially. Please let me know if you have questions. There are also other smaller good first issues if you are interested, just search with label "mlir:spirv" and "good first issues" to find them.
yes sure thing @antiagainst . I was getting familiar with mlir and will update you when a question of which I can't answer on the discourse arise.
Hey @bhaskar1001101 and @Sh0g0-1758, is this something you are still interested? Have you able to make progress on it?
@antiagainst Any particular insights that you would like to give apart from the comment links in the issue description?
I'll take a look at this as well.
Rough breakdown of the migration steps:
mlir_vulkan_runtime
.mlir/test/Integration/GPU/Vulkan
mlir_spirv_cpu_runtime
.
mlir/test/Integration/Dialect/SPIRV
It might be easier to start with the spirv cpu runner (the conversion pipeline is much simpler) and then move to the vulkan runner.
cc: @andfau-amd
@llvm/issue-subscribers-infrastructure
Author: Lei Zhang (antiagainst)
@kuhar suggested that I dump the IR used by the runners already integrated with the CPU runner, so we can see how they pass along the binary.
I took https://github.com/llvm/llvm-project/blob/111932d5cae0199d9c59669b37232a011f8b8757/mlir/test/Integration/GPU/ROCM/printf.mlir and extracted a command line (gfx90a
chip manually inserted):
../llvm-build/bin/mlir-opt mlir/test/Integration/GPU/ROCM/printf.mlir | \
../llvm-build/bin/mlir-opt -pass-pipeline='builtin.module(gpu.module(strip-debuginfo,convert-gpu-to-rocdl{index-bitwidth=32 runtime=HIP}),rocdl-attach-target{chip=gfx90a})' | \
../llvm-build/bin/mlir-opt -gpu-to-llvm -reconcile-unrealized-casts -gpu-module-to-binary
With the AMDGPU target built, the ROCm bitcode (rocm-device-libs
) installed, and LLVM LLD available (either ROCm's version or, in my case, the ROCDL MLIR target hacked to call LLVM's ld.lld
), this can give you:
module attributes {gpu.container_module} {
gpu.binary @kernels [#gpu.object<#rocdl.target<chip = "gfx90a">, kernels = <[#gpu.kernel_metadata<"hello", !llvm.func<void ()>, metadata = {agpr_count = 0 : i64, group_segment_fixed_size = 0 : i64, max_flat_workgroup_size = 256 : i64, private_segment_fixed_size = 0 : i64, reqd_workgroup_size = array<i32: -1, -1, -1>, sgpr_count = 20 : i64, sgpr_spill_count = 0 : i64, vgpr_count = 20 : i64, vgpr_spill_count = 0 : i64, wavefront_size = 64 : i64, workgroup_size_hint = array<i32: -1, -1, -1>}>]>, bin = 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LLD 20.0.0 (https://github.com/llvm/llvm-project.git e13cbaca6925629165e3cced90b33777f0fe09fe)\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\10\00\00\00\00\02\08\00@;\00\00\00\00\00\00\00\00\00\00\00\00\00\00\01\00\00\00\12\03\07\00\00\18\00\00\00\00\00\00\08\0F\00\00\00\00\00\00\07\00\00\00\11\00\06\00\00\07\00\00\00\00\00\00@\00\00\00\00\00\00\00\00.note\00.dynsym\00.gnu.hash\00.hash\00.dynstr\00.rodata\00.text\00.dynamic\00.relro_padding\00.comment\00.symtab\00.shstrtab\00.strtab\00\00hello\00hello.kd\00_DYNAMIC\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\01\00\00\00\07\00\00\00\02\00\00\00\00\00\00\00\00\02\00\00\00\00\00\00\00\02\00\00\00\00\00\00P\04\00\00\00\00\00\00\00\00\00\00\00\00\00\00\04\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\07\00\00\00\0B\00\00\00\02\00\00\00\00\00\00\00P\06\00\00\00\00\00\00P\06\00\00\00\00\00\00H\00\00\00\00\00\00\00\05\00\00\00\01\00\00\00\08\00\00\00\00\00\00\00\18\00\00\00\00\00\00\00\0F\00\00\00\F6\FF\FFo\02\00\00\00\00\00\00\00\98\06\00\00\00\00\00\00\98\06\00\00\00\00\00\00$\00\00\00\00\00\00\00\02\00\00\00\00\00\00\00\08\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\19\00\00\00\05\00\00\00\02\00\00\00\00\00\00\00\BC\06\00\00\00\00\00\00\BC\06\00\00\00\00\00\00 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llvm.func @main() {
%0 = llvm.mlir.constant(2 : index) : i64
%1 = llvm.mlir.constant(1 : index) : i64
gpu.launch_func @kernels::@hello blocks in (%1, %1, %1) threads in (%0, %1, %1) : i64
llvm.return
}
}
I have now done the same thing for CUDA. I took https://github.com/llvm/llvm-project/blob/111932d5cae0199d9c59669b37232a011f8b8757/mlir/test/Integration/GPU/CUDA/printf.mlir and hacked together a working command line (using examples from documentation and based on what my ptxas
version seemed to support):
../llvm-build/bin/mlir-opt mlir/test/Integration/GPU/CUDA/printf.mlir | \
../llvm-build/bin/mlir-opt -gpu-lower-to-nvvm-pipeline="cubin-chip=sm_87 cubin-features=+ptx75 opt-level=3"
With the NVPTX target built and ptxas
installed (from nvidia-cuda-toolkit
), this can give you:
module attributes {gpu.container_module} {
gpu.binary @kernels [#gpu.object<#nvvm.target<O = 3, chip = "sm_87", features = "+ptx75">, "P\EDU\BA\01\00\10\00\B0\10\00\00\00\00\00\00\02\00\01\01@\00\00\00\A0\0D\00\00\00\00\00\00\00\00\00\00\00\00\00\00\07\00\01\00W\00\00\00\00\00\00\00\00\00\00\00\11\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\7FELF\02\01\013\07\00\00\00\00\00\00\00\02\00\BE\00s\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00 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\08\00\00\00\00\00\00(\08\00\00\00\00\00\000\08\00\00\00\00\00\008\08\00\00\00\00\01\00\00\08\00\00\00\00\01\00\08\08\00\00\00\00\01\00\10\08\00\00\00\00\01\00\18\08\00\00\00\00\01\00 \08\00\00\00\00\01\00(\08\00\00\00\00\01\000\08\00\00\00\00\01\008\08\00\00\00\00\02\00\00\08\00\00\00\00\02\00\08\08\00\00\00\00\02\00\10\08\00\00\00\00\02\00\18\08\00\00\00\00\02\00 \08\00\00\00\00\02\00(\08\00\00\00\00\02\000\08\00\00\00\00\02\008\08\00\00\00\00\00\00\00\14,\00\00\00`\02\00\00\00\00\00\00:\00\00\00\08\00\00\00\E0\01\00\00\00\00\00\009\00\00\00\03\00\00\00\90\01\00\00\00\00\00\008\00\00\00\03\00\00\00P\02\00\00\00\00\00\009\00\00\00\07\00\00\00p\02\00\00\00\00\00\00@\02\00\00\00\00\00\008\00\00\00\07\00\00\00p\02\00\00\00\00\00\00H\00\00\00\00\00\00\00\02\00\00\00\07\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\0C|\00\FF\02\00\00\00pP\F0\0B\00\DA\0F\00G\09\00\00 \01\00\00\00\00\80\03\00\EA\0F\00Vy\00\00\FF\FF\FF\FF\00\00\00\00\00\E8\0F\00U\7F\01\00\00\00\00\00\00\00\10\00\00\E8\0F\00U\7F\02\01\00\00\00\00\00\00\10\00\00\E8\0F\00U\7F\03\02\00\00\00\00\00\00\10\00\00\E8\0F\00U\7F\04\03\00\00\00\00\00\00\10\00\00\E8\0F\00U\7F\05\04\00\00\00\00\00\00\10\00\00\E8\0F\00U\7F\06\05\00\00\00\00\00\00\10\00\00\E8\0F\00U\7F\07\06\00\00\00\00\00\00\10\00\00\E8\0F\00U\7F\08\07\00\00\00\00\00\00\10\00\00\E8\0F\00U\7F\09\08\00\00\00\00\00\00\10\00\00\E8\0F\00U\7F\0A\09\00\00\00\00\00\00\10\00\00\E8\0F\00U\7F\0B\0A\00\00\00\00\00\00\10\00\00\E8\0F\00U\7F\0C\0B\00\00\00\00\00\00\10\00\00\E8\0F\00U\7F\0D\0C\00\00\00\00\00\00\10\00\00\E8\0F\00U\7F\0E\0D\00\00\00\00\00\00\10\00\00\E8\0F\00U\7F\0F\0E\00\00\00\00\00\00\10\00\00\E8\0F\00Vy\00\0F\00\00\00\00\00\00\00\00\00\E8\0F\00\82x\02\00\01\00\00\00\00\00\00\00\00\E4\0F\00$v\01\FF\00\0A\00\00\FF\00\8E\07\00\C6\0F\00\19y\02\00\00\00\00\00\00!\00\00\00\22\0E\005t\08\FF\00\00\00\00\FF\01\00\00\00\E2\0F\00\10x\01\01\E8\FF\FF\FF\FF\E0\FF\07\00\E2\0F\00$t\00\FF\02\00\00\00\FF\00\8E\07\00\E2\0F\00\82x\04\00\00\00\00\00\00\00\00\00\00\E2\0F\00$t\09\FF\00\00\08@\FF\00\8E\07\00\E2\0F\00\10z\06\01\00\08\00\00\FF\E0\F1\07\00\E2\0F\00$r\03\FF\FF\00\00\00\FF\00\8E\07\00\E2\0F\00\87s\00\01\00\08\00\00\00\00\10\00\00\E2\03\00\82x\05\00\00\00\00\00\00\00\00\00\00\E2\0F\00\10z\07\FF\00\09\00\00\FF\E4\7F\00\00\E2\0F\00$~\04\FF\04\00\00\00\FF\00\8E\0F\00\E2\0F\00\87s\00\01\08\10\00\00\00\0A\10\00\00\E2\03\00\02|\05\00\05\00\00\00\00\0F\00\08\00\C6\0F\00\87s\00\01\02\00\00\00\00\0A\10\00\00\E8\13\00\02x\14\00\00\00\00\00\00\0F\00\00\00\E4\0F\00\02x\15\00\00\00\00\00\00\0F\00\00\00\C8\0F\00Cy\00\00\00\00\00\00\00\00\C0\03\00\EA/\00My\00\00\00\00\00\00\00\00\80\03\00\EA\0F\00Gy\00\00\F0\FF\FF\FF\FF\FF\83\03\00\C0\0F\00\18y\00\00\00\00\00\00\00\00\00\00\00\C0\0F\00\18y\00\00\00\00\00\00\00\00\00\00\00\C0\0F\00\18y\00\00\00\00\00\00\00\00\00\00\00\C0\0F\00\18y\00\00\00\00\00\00\00\00\00\00\00\C0\0F\00\18y\00\00\00\00\00\00\00\00\00\00\00\C0\0F\00\18y\00\00\00\00\00\00\00\00\00\00\00\C0\0F\00\18y\00\00\00\00\00\00\00\00\00\00\00\C0\0F\00\18y\00\00\00\00\00\00\00\00\00\00\00\C0\0F\00\18y\00\00\00\00\00\00\00\00\00\00\00\C0\0F\00\18y\00\00\00\00\00\00\00\00\00\00\00\C0\0F\00\18y\00\00\00\00\00\00\00\00\00\00\00\C0\0F\00\18y\00\00\00\00\00\00\00\00\00\00\00\C0\0F\00\18y\00\00\00\00\00\00\00\00\00\00\00\C0\0F\00\18y\00\00\00\00\00\00\00\00\00\00\00\C0\0F\00\18y\00\00\00\00\00\00\00\00\00\00\00\C0\0F\00Hello from %lld, %d, %f\0A\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\01\00\00\00\03\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00@\00\00\00\00\00\00\00\E2\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\01\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\0B\00\00\00\03\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\22\01\00\00\00\00\00\00\05\01\00\00\00\00\00\00\00\00\00\00\00\00\00\00\01\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\13\00\00\00\02\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00(\02\00\00\00\00\00\00\D8\00\00\00\00\00\00\00\02\00\00\00\07\00\00\00\08\00\00\00\00\00\00\00\18\00\00\00\00\00\00\00\A3\00\00\00\01\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\03\00\00\00\00\00\00p\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\01\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00)\00\00\00\00\00\00p\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00p\03\00\00\00\00\00\000\00\00\00\00\00\00\00\03\00\00\00\00\00\00\00\04\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00>\00\00\00\00\00\00p\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\A0\03\00\00\00\00\00\00(\00\00\00\00\00\00\00\03\00\00\00\0C\00\00\00\04\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\D3\00\00\00\0B\00\00p\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\C8\03\00\00\00\00\00\00\D8\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\08\00\00\00\00\00\00\00\08\00\00\00\00\00\00\00n\00\00\00\09\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\A0\04\00\00\00\00\00\000\00\00\00\00\00\00\00\03\00\00\00\0C\00\00\00\08\00\00\00\00\00\00\00\10\00\00\00\00\00\00\00~\00\00\00\04\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\D0\04\00\00\00\00\00\000\00\00\00\00\00\00\00\03\00\00\00\0C\00\00\00\08\00\00\00\00\00\00\00\18\00\00\00\00\00\00\00\B0\00\00\00\09\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\05\00\00\00\00\00\00\10\00\00\00\00\00\00\00\03\00\00\00\04\00\00\00\08\00\00\00\00\00\00\00\10\00\00\00\00\00\00\00\8F\00\00\00\01\00\00\00\02\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\10\05\00\00\00\00\00\00`\01\00\00\00\00\00\00\00\00\00\00\0C\00\00\00\04\00\00\00\00\00\00\00\00\00\00\00\00\00\00\002\00\00\00\01\00\00\00\06\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\80\06\00\00\00\00\00\00\80\03\00\00\00\00\00\00\03\00\00\00\07\00\00\18\80\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00^\00\00\00\01\00\00\00\03\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\0A\00\00\00\00\00\00\19\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\01\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\01\00\01\01H\00\00\00\88\02\00\00\00\00\00\00\86\02\00\00@\00\00\00\05\00\07\00W\00\00\00\00\00\00\00\00\00\00\00\11 \00\00\00\00\00\00\00\00\00\00\00\00\00\00\06\04\00\00\00\00\00\00\00\00\00\00\00\00\00\00\F0 \0A\0A\0A\0A.version 7.5\0A.target sm_87\0A.address_size 64.\00\F0\0Bextern .func (.param .b32 \12\00\F5\05_retval0) vprintf\0A(\0A$\00$64\16\00\11_\13\00?_0,\1D\00\08\F2\0C1\0A)\0A;\0A.global .align 1 .b8 (\00\F0\08Format_0[25] = {72, 101\05\00\148\05\00Q11, 3\18\00\00\05\00#14\13\002109\18\00)37/\00h00, 44\1B\00\0D\11\00\01M\00 };8\01\F6\0Disible .entry hello()\0A{\0A.loc\B3\00\118\B3\00!__\15\00\F2\02_depot0[24];\0A.reg\FA\00;%SP\0F\00\15L\10\00\9516 %rs<2>\12\00\8932 %r<4>3\00\D3rd<7>;\0A\0Amov.uD\00\1B,w\00b;\0Acvta\9F\00\04%\00\13,n\00\018\00\01Z\00\911, %tid.x/\00\00(\00\03\19\00\10d\1A\00rr1;\0Aadd?\00Brd2,E\00\190\16\00#3,\80\00W0;\0Astq\00\10[\1D\00!],M\00\03t\00\02\E0\00H1, 2,\00\128+\00!+8-\00\14s-\00\02_\00\FF\074, 4613937818241073152k\00\012+16n\00\194A\00+5,D\02\03\1A\01\02m\02\04&\00\116:\00x5;\0A{ \0A\09\A9\02\01\0B\00\02\DB\00\01\0B\00\01\15\00\12[\16\00\22+0q\00=6;\0A3\00\1F13\00\02\1413\0082;\0AP\03\03K\03\C4;\0Acall.uni (^\033, \0A-\03Q, \0A(\0A5\0020, \09\00t1\0A);\0Aldh\00\01\BB\01C2, [=\00\F0\03+0];\0A} \0A\09ret;\0A\0A}\0A\00\00\00">]
llvm.func @main() {
%0 = llvm.mlir.constant(1 : index) : i64
%1 = llvm.mlir.constant(2 : index) : i64
gpu.launch_func @kernels::@hello blocks in (%0, %0, %0) threads in (%1, %0, %0) : i64
llvm.return
}
}
And here's SYCL.
Command line:
../llvm-build/bin/mlir-opt mlir/test/Integration/GPU/SYCL/gpu-addf32-to-spirv.mlir -pass-pipeline='builtin.module(spirv-attach-target{ver=v1.0 caps=Addresses,Int64,Kernel},convert-gpu-to-spirv{use-64bit-index=true},gpu.module(spirv.module(spirv-lower-abi-attrs,spirv-update-vce)),func.func(llvm-request-c-wrappers),convert-scf-to-cf,convert-cf-to-llvm,convert-arith-to-llvm,convert-math-to-llvm,convert-func-to-llvm,gpu-to-llvm{use-bare-pointers-for-kernels=true},gpu-module-to-binary,expand-strided-metadata,lower-affine,finalize-memref-to-llvm,reconcile-unrealized-casts)'
Output:
This one was very straightforward to get working, no runtime needed. And they're already doing serialized SPIR-V with spirv-opt
here, so probably a significant about of code reuse or at least inspiration can be done here. :)
First piece of the mlir-spirv-cpu-runner
work: https://github.com/llvm/llvm-project/pull/111575
Last(?) piece of the mlir-spirv-cpu-runner
work: https://github.com/llvm/llvm-project/pull/114563
Make spirv serialization available to mlir-opt. See the same subtask above.
If we want to do this (for the SPIR-V Runner), then https://github.com/llvm/llvm-project/issues/115348 is for tracking it. I know it's part of the outline from this ticket, but I'm only inclined to do it for the SPIR-V Runner if it somehow makes the Vulkan Runner part of this easier, I guess we'll see.
I realised that the Vulkan runner is already serializing the SPIR-V binary and embedding it in MLIR, it's just presumably not producing quite the shape of IR that we would like it to have. So I decided to dump an example of an existing test (by hacking the runner to do module.dump()
after running the MLIR pipeline) for comparison to dumps from the other runners.
../llvm-build/bin/mlir-vulkan-runner mlir/test/mlir-vulkan-runner/addf.mlir --shared-libs=../llvm-build/lib/libvulkan-runtime-wrappers.so,../llvm-build/lib/libmlir_runner_utils.so --entry-point-result=void
Looks like it uses some SPIRV_BIN
constant instead of the desired gpu.binary
. Interesting.
Ah, and that's after the pass added with createConvertVulkanLaunchFuncToVulkanCallsPass()
. If that pass is skipped, the binary blob is instead embedded in a line looking like llvm.call @vulkanLaunch(%3, %4, %4, %50, %51, %52, %53, %54, %55, %56, %57, %58, %59, %60, %61, %62, %63, %64) {spirv_blob = "
.
Oh, if I comment out everything starting with and following createConvertGpuLaunchFuncToVulkanLaunchFuncPass()
, then the IR starts to look more like what we want, including the use of gpu.launch_func
. But it doesn't have a SPIR-V blob. Okay, maybe I'm starting to understand this better. I need to compare the pass pipeline with SYCL's I suppose.
Aha okay, so:
GpuLaunchFuncToVulkanLaunchFuncPass
. This pass serializes the GPU device code module into a SPIR-V binary, and it rewrites the host part to use Vulkan-specific control code at the same time.GpuModuleToBinaryPass
, which similarly does a serialization, but it does it in a generic target-independent fashion, and supports several serialization formats (SPIR-V, ROCDL, NVVM, LLVM). I can also see the ROCM mlir-opt
usage I quoted above also uses this pass.So, I guess the focus of this whole project is to replace the former with the latter. All the other changes will be essentially supporting infrastructure for this change.
We added mlir-vulkan-runner in way early days of MLIR. Recently various MLIR client API runners (e.g., mlir-cuda-runner) were removed in favor of performing translation using
mlir-opt
and then leveragemlir-cpu-runner
as the host coordnation mechanism. See @joker-eph's https://github.com/llvm/llvm-project/pull/65539#issuecomment-1710872236 for more context. We should migrate mlir-vulkan-runner to follow there. This would unify the runner story in MLIR to have one single mlir-runner, as @Jianhui-Li's https://github.com/llvm/llvm-project/pull/65539#issuecomment-1712414848 here.