Open m-saito-fj opened 7 months ago
@llvm/issue-subscribers-backend-aarch64
Author: m-saito-fj (m-saito-fj)
We've seen a few other cases of this happening, usually is SLP vectorizes. I think it would make sense to attempt to recognize it in the loop vectorizer instead through a vplan transform, so that it can get a better cost model and produce better code.
Original code:
Option:
-Ofast -march=armv8.2-a+sve
In the original code, only interleave is applied in loop-vectorize. (VF=1, IC=2)
Code for manually rerolling the original code:
In the manually rerolled code, vectorization is applied in loop-vectorize (VF=vscale x 4, IC=2) Register an Issue as a valid case for Loop-reroll.