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[RISCV] Don't use MachineInstr::isIdenticalTo in hasSameAVL #90431

Closed lukel97 closed 2 weeks ago

lukel97 commented 2 weeks ago

MachineInstr::isIdenticalTo compares that the operands and flags are the same IIUC, but I think we actually want to check that it's the same MachineInstr * with respect to position in the block etc.

llvmbot commented 2 weeks ago

@llvm/pr-subscribers-backend-risc-v

Author: Luke Lau (lukel97)

Changes MachineInstr::isIdenticalTo compares that the operands and flags are the same IIUC, but I think we actually want to check that it's the same MachineInstr * with respect to position in the block etc. --- Full diff: https://github.com/llvm/llvm-project/pull/90431.diff 1 Files Affected: - (modified) llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp (+2-2) ``````````diff diff --git a/llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp b/llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp index b5fd508fa77de2..b27e1dd258ebd0 100644 --- a/llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp +++ b/llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp @@ -568,8 +568,8 @@ class VSETVLIInfo { bool hasSameAVL(const VSETVLIInfo &Other) const { if (hasAVLReg() && Other.hasAVLReg()) - return getAVLDefMI().isIdenticalTo(Other.getAVLDefMI()) && - getAVLReg() == Other.getAVLReg(); + return AVLRegDef.DefMI == Other.AVLRegDef.DefMI && + AVLRegDef.DefReg == Other.AVLRegDef.DefReg; if (hasAVLImm() && Other.hasAVLImm()) return getAVLImm() == Other.getAVLImm(); ``````````