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[LoongArch] Use sign extend for i32 arguments in makeLibCall on LA64 #92375

Closed wangleiat closed 5 months ago

wangleiat commented 5 months ago

The 32 bits arguments and returns on LA64 are always sign extended to i64. So we should be taking this into account around libcalls.

llvmbot commented 5 months ago

@llvm/pr-subscribers-backend-loongarch

Author: wanglei (wangleiat)

Changes The 32 bits arguments and returns on LA64 are always sign extended to i64. So we should be taking this into account around libcalls. --- Full diff: https://github.com/llvm/llvm-project/pull/92375.diff 6 Files Affected: - (modified) llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp (+8) - (modified) llvm/lib/Target/LoongArch/LoongArchISelLowering.h (+1) - (modified) llvm/test/CodeGen/LoongArch/calling-conv-lp64s.ll (+1-1) - (modified) llvm/test/CodeGen/LoongArch/libcall-extend.ll (-3) - (modified) llvm/test/CodeGen/LoongArch/sextw-removal.ll (+8-8) - (modified) llvm/test/CodeGen/LoongArch/soft-fp-to-int.ll (+1-1) ``````````diff diff --git a/llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp b/llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp index 6740563b90b45..6a0db9c27defe 100644 --- a/llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp +++ b/llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp @@ -4983,3 +4983,11 @@ ISD::NodeType LoongArchTargetLowering::getExtendForAtomicCmpSwapArg() const { // TODO: LAMCAS will use amcas{_DB,}.[bhwd] which does not require extension. return ISD::SIGN_EXTEND; } + +bool LoongArchTargetLowering::shouldSignExtendTypeInLibCall( + EVT Type, bool IsSigned) const { + if (Subtarget.is64Bit() && Type == MVT::i32) + return true; + + return IsSigned; +} diff --git a/llvm/lib/Target/LoongArch/LoongArchISelLowering.h b/llvm/lib/Target/LoongArch/LoongArchISelLowering.h index 31b4d65195634..a344eadee8667 100644 --- a/llvm/lib/Target/LoongArch/LoongArchISelLowering.h +++ b/llvm/lib/Target/LoongArch/LoongArchISelLowering.h @@ -239,6 +239,7 @@ class LoongArchTargetLowering : public TargetLowering { return false; } bool shouldConsiderGEPOffsetSplit() const override { return true; } + bool shouldSignExtendTypeInLibCall(EVT Type, bool IsSigned) const override; private: /// Target-specific function used to lower LoongArch calling conventions. diff --git a/llvm/test/CodeGen/LoongArch/calling-conv-lp64s.ll b/llvm/test/CodeGen/LoongArch/calling-conv-lp64s.ll index f577435114967..184ba7363e1b3 100644 --- a/llvm/test/CodeGen/LoongArch/calling-conv-lp64s.ll +++ b/llvm/test/CodeGen/LoongArch/calling-conv-lp64s.ll @@ -10,7 +10,7 @@ define i64 @callee_float_in_regs(i64 %a, float %b) nounwind { ; CHECK-NEXT: st.d $ra, $sp, 8 # 8-byte Folded Spill ; CHECK-NEXT: st.d $fp, $sp, 0 # 8-byte Folded Spill ; CHECK-NEXT: move $fp, $a0 -; CHECK-NEXT: bstrpick.d $a0, $a1, 31, 0 +; CHECK-NEXT: addi.w $a0, $a1, 0 ; CHECK-NEXT: bl %plt(__fixsfdi) ; CHECK-NEXT: add.d $a0, $fp, $a0 ; CHECK-NEXT: ld.d $fp, $sp, 0 # 8-byte Folded Reload diff --git a/llvm/test/CodeGen/LoongArch/libcall-extend.ll b/llvm/test/CodeGen/LoongArch/libcall-extend.ll index 957a15141802d..3cc8a6645f368 100644 --- a/llvm/test/CodeGen/LoongArch/libcall-extend.ll +++ b/llvm/test/CodeGen/LoongArch/libcall-extend.ll @@ -8,7 +8,6 @@ define signext i32 @convert_float_to_i32(i32 %tmp, float %a) nounwind { ; CHECK-NEXT: st.d $ra, $sp, 8 # 8-byte Folded Spill ; CHECK-NEXT: bstrpick.d $a0, $a1, 31, 0 ; CHECK-NEXT: bl %plt(__fixsfsi) -; CHECK-NEXT: addi.w $a0, $a0, 0 ; CHECK-NEXT: ld.d $ra, $sp, 8 # 8-byte Folded Reload ; CHECK-NEXT: addi.d $sp, $sp, 16 ; CHECK-NEXT: ret @@ -23,7 +22,6 @@ define signext i32 @convert_double_to_i32(i32 %tmp, double %a) nounwind { ; CHECK-NEXT: st.d $ra, $sp, 8 # 8-byte Folded Spill ; CHECK-NEXT: move $a0, $a1 ; CHECK-NEXT: bl %plt(__fixdfsi) -; CHECK-NEXT: addi.w $a0, $a0, 0 ; CHECK-NEXT: ld.d $ra, $sp, 8 # 8-byte Folded Reload ; CHECK-NEXT: addi.d $sp, $sp, 16 ; CHECK-NEXT: ret @@ -39,7 +37,6 @@ define signext i32 @convert_fp128_to_i32(i32 %tmp, fp128 %a) nounwind { ; CHECK-NEXT: move $a0, $a1 ; CHECK-NEXT: move $a1, $a2 ; CHECK-NEXT: bl %plt(__fixtfsi) -; CHECK-NEXT: addi.w $a0, $a0, 0 ; CHECK-NEXT: ld.d $ra, $sp, 8 # 8-byte Folded Reload ; CHECK-NEXT: addi.d $sp, $sp, 16 ; CHECK-NEXT: ret diff --git a/llvm/test/CodeGen/LoongArch/sextw-removal.ll b/llvm/test/CodeGen/LoongArch/sextw-removal.ll index 7708873e264d9..c9f3ed5237aa1 100644 --- a/llvm/test/CodeGen/LoongArch/sextw-removal.ll +++ b/llvm/test/CodeGen/LoongArch/sextw-removal.ll @@ -257,11 +257,11 @@ define void @test6(i32 signext %arg, i32 signext %arg1) nounwind { ; CHECK-NEXT: # =>This Inner Loop Header: Depth=1 ; CHECK-NEXT: addi.w $a0, $fp, 0 ; CHECK-NEXT: bl %plt(baz) -; CHECK-NEXT: bstrpick.d $s0, $a0, 31, 0 -; CHECK-NEXT: move $a0, $s0 +; CHECK-NEXT: move $s0, $a0 +; CHECK-NEXT: bstrpick.d $a0, $a0, 31, 0 ; CHECK-NEXT: bl %plt(__fixsfsi) ; CHECK-NEXT: move $fp, $a0 -; CHECK-NEXT: move $a0, $s0 +; CHECK-NEXT: addi.w $a0, $s0, 0 ; CHECK-NEXT: move $a1, $zero ; CHECK-NEXT: bl %plt(__nesf2) ; CHECK-NEXT: bnez $a0, .LBB5_1 @@ -284,11 +284,11 @@ define void @test6(i32 signext %arg, i32 signext %arg1) nounwind { ; NORMV-NEXT: # =>This Inner Loop Header: Depth=1 ; NORMV-NEXT: addi.w $a0, $fp, 0 ; NORMV-NEXT: bl %plt(baz) -; NORMV-NEXT: bstrpick.d $s0, $a0, 31, 0 -; NORMV-NEXT: move $a0, $s0 +; NORMV-NEXT: move $s0, $a0 +; NORMV-NEXT: bstrpick.d $a0, $a0, 31, 0 ; NORMV-NEXT: bl %plt(__fixsfsi) ; NORMV-NEXT: move $fp, $a0 -; NORMV-NEXT: move $a0, $s0 +; NORMV-NEXT: addi.w $a0, $s0, 0 ; NORMV-NEXT: move $a1, $zero ; NORMV-NEXT: bl %plt(__nesf2) ; NORMV-NEXT: bnez $a0, .LBB5_1 @@ -562,7 +562,7 @@ define void @test10(i32 signext %arg, i32 signext %arg1) nounwind { ; CHECK-NEXT: addi.w $a0, $fp, 0 ; CHECK-NEXT: bl %plt(baz) ; CHECK-NEXT: move $fp, $a0 -; CHECK-NEXT: bstrpick.d $a0, $a0, 31, 0 +; CHECK-NEXT: addi.w $a0, $a0, 0 ; CHECK-NEXT: move $a1, $zero ; CHECK-NEXT: bl %plt(__nesf2) ; CHECK-NEXT: bnez $a0, .LBB9_1 @@ -584,7 +584,7 @@ define void @test10(i32 signext %arg, i32 signext %arg1) nounwind { ; NORMV-NEXT: addi.w $a0, $fp, 0 ; NORMV-NEXT: bl %plt(baz) ; NORMV-NEXT: move $fp, $a0 -; NORMV-NEXT: bstrpick.d $a0, $a0, 31, 0 +; NORMV-NEXT: addi.w $a0, $a0, 0 ; NORMV-NEXT: move $a1, $zero ; NORMV-NEXT: bl %plt(__nesf2) ; NORMV-NEXT: bnez $a0, .LBB9_1 diff --git a/llvm/test/CodeGen/LoongArch/soft-fp-to-int.ll b/llvm/test/CodeGen/LoongArch/soft-fp-to-int.ll index e6df401f0fef5..c23fc5a73ae0a 100644 --- a/llvm/test/CodeGen/LoongArch/soft-fp-to-int.ll +++ b/llvm/test/CodeGen/LoongArch/soft-fp-to-int.ll @@ -145,7 +145,7 @@ define i64 @fptosi_i64_float(float %X) nounwind { ; LA64: # %bb.0: ; LA64-NEXT: addi.d $sp, $sp, -16 ; LA64-NEXT: st.d $ra, $sp, 8 # 8-byte Folded Spill -; LA64-NEXT: bstrpick.d $a0, $a0, 31, 0 +; LA64-NEXT: addi.w $a0, $a0, 0 ; LA64-NEXT: bl %plt(__fixsfdi) ; LA64-NEXT: ld.d $ra, $sp, 8 # 8-byte Folded Reload ; LA64-NEXT: addi.d $sp, $sp, 16 ``````````