minimalistic trigger module in FPGA - Githubissues

lneuhaus / pyrpl

pyrpl turns your RedPitaya into a powerful DSP device, especially suitable as a lockbox in quantum optics experiments.

http://lneuhaus.github.io/pyrpl/

MIT License

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minimalistic trigger module in FPGA #199

Closed lneuhaus closed 7 years ago

lneuhaus commented 7 years ago

... would be very nice. Concept for FPGA:

remove 1 PID
replace by new red_pitaya_trigger_module
trigger module has input and output like any dsp signal and furthermore registers
- threshold
- hysteresis
- sign of hysteresis defines whether negative_edge or positive_edge trigger
- armed -> writing sets the state, reading retrieves whether trigger has occured
- auto_reset -> defines whether trigger auto_resets immediately after event
- phase_input in (asg1, asg2, iq0, iq1, iq2)
- phase_offset
- output_signal in
- TTL (outputs 1 for 1 cycle after trigger event, otherwise 0)
- phase (constantly outputs last trigger_phase)
- fold_at_pi option

lneuhaus commented 7 years ago

done everything, new trig module can be used as standalone (in conjunction with asg0) or as trigger for scope