Hi,
When I used OpenFPGA, the tool required a configuration cell that has two outputs (one regular and the other inverted). However, the inverted port is left unconnected in the Verilog. If we can use a single-port configuration cell, the area of the fabric could be smaller.
Thanks!
Hi, When I used OpenFPGA, the tool required a configuration cell that has two outputs (one regular and the other inverted). However, the inverted port is left unconnected in the Verilog. If we can use a single-port configuration cell, the area of the fabric could be smaller. Thanks!