lnis-uofu / OpenFPGA

An Open-source FPGA IP Generator
https://openfpga.readthedocs.io/en/master/
MIT License
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Segment fault #55

Closed buddynohair closed 4 years ago

buddynohair commented 4 years ago

Hello, i try to generate the Verilog netlists and testbenches with the command "python3 openfpga_flow/scripts/run_fpga_task.py openfpga_shell/configuration_chain" you have given on the toturial. But the application is crash because of a memory-access-error (core dumped) --> abgebrochen(Speicherabzug abgeschrieben)

Screenshot
tangxifan commented 4 years ago

Hello, In my view, this is mainly due to the out-of-date path to the task file. Recently, the configuration_chain has been moved to openfpga_shell/full_testbench/configuration_chain. But the paths in the tutorial has not been updated. Meanwhile we are patching the tutorial, can you try python3 openfpga_flow/scripts/run_fpga_task.py openfpga_shell/full_testbench/configuration_chain?

buddynohair commented 4 years ago

Hello, i don't think it's due to the path. Actually i forgot to tell you that i already changed the commend with the correct path and receive this result, otherwise the file can't be found if i give the wrong path.

Screenshot1
tangxifan commented 4 years ago

Hello, No worries. This test case is in our CI which is tested on each commit. If it fails on a local machine, it is usually a matter of setup issue.

Would you mind sharing the `and2_run.openfpga` in your first screenshot?
This will helps me reproduce the bug.
buddynohair commented 4 years ago

hello, i just ran the script with the new command cd ${TRAVIS_BUILD_DIR} python3 /home/ukmsm/Schreibtisch/OpenFPGA/openfpga_flow/scripts/run_fpga_task.py openfpga_shell/full_testbench/configuration_chain --debug --show_thread_logs But i don't think the problem is solved.

Screenshot3 Screenshot4 Screenshot5
tangxifan commented 4 years ago

Hello, Can you provide more details so that we can reproduce your problem? For example:

buddynohair commented 4 years ago

Hello,

*The system is Centos 8

tangxifan commented 4 years ago

Hello, That may explain the problem. We are testing continuously on Ubuntu and Centos 7. We have not tried Centos 8 yet. Can you share your and2_run.openfpga file? I would like see if there is anything that causes the seg fault.

buddynohair commented 4 years ago

Hello, yes for sure and2_run.openfpga.log

tangxifan commented 4 years ago

Hello, The file seems to be ok. Can you run valgrind openfpga -f and2_run.openfpga to trace the segment fault? I will see where the bug comes from.

buddynohair commented 4 years ago

Hello, i have run it with the GDB and Valgrind. The first Screenshot is the result from GDB, and the rest is from Valgrind. im truly sorry, i don't know how to output the errors and save it as a log file. My tutor has also run it with the GDB and has some ideas. For example: Error in libopenfpga/libopenfpgashell/src/shell.tpp, in line 300: if ('#' == line.front()) {

we need to test before, if the string is empty : if (line.empty() || '#' == line.front()) {

This could be a solution:

diff --git a/libopenfpga/libopenfpgashell/src/shell.tpp b/libopenfpga/libopenfpgashell/src/shell.tpp index b5c506d4..47476ab6 100644 --- a/libopenfpga/libopenfpgashell/src/shell.tpp +++ b/libopenfpga/libopenfpgashell/src/shell.tpp @@ -297,7 +297,7 @@ void Shell::run_script_mode(const char script_file_name, T& context) { / Read line by line / while (getline(fp, line)) { / If the line that starts with '#', it is commented, we can skip */

Valgrind 1 Valgrind 2 Valgrind 3
tangxifan commented 4 years ago

Hello, Thanks for the inputs. Now we know the sources of the bug. I have patched on the master branch by following your suggestions. Please try it and see if it solves the problem. I also encourage you to create pull requests which can resolve the compatibility on different OS.

buddynohair commented 4 years ago

Hello, really thank you for your help. After this change, the application is not crash any more. I think we have dealt with the issue we talked before. But there's new problem coming out. In the 00_and2/MIN_ROUTE_CHAN_WIDTH_out.log, it says: failed to execute iverilog_verification because of no such directory : iverilog. And another error --> AttributeError: 'FileNotFoundError' object has no attribute 'output' And i don't understand, in the openfpgashell.log, it says , the execution is successful finished. 00_and2_MIN_ROUTE_CHAN_WIDTH_out.log openfpgashell.log and2_run.openfpga.log

buddynohair commented 4 years ago

Ah thank you , i just find the Verilog verification is the next step . Maybe i can run modelsim instead. And thank you again for solving the problem for me.

tangxifan commented 4 years ago

Hello, really thank you for your help. After this change, the application is not crash any more. I think we have dealt with the issue we talked before. But there's new problem coming out. In the 00_and2/MIN_ROUTE_CHAN_WIDTH_out.log, it says: failed to execute iverilog_verification because of no such directory : iverilog. And another error --> AttributeError: 'FileNotFoundError' object has no attribute 'output' And i don't understand, in the openfpgashell.log, it says , the execution is successful finished. 00_and2_MIN_ROUTE_CHAN_WIDTH_out.log openfpgashell.log and2_run.openfpga.log

Hello, Please make sure you have iVerilog correctly installed. You can find all the dependency required here