How do we change the standard cell library being used here?

[iamkarthikbk]

I want to know if there's way I can do exactly what SOFA is doing but not use skywater standard cells. Is there a way I can just select which standard cell library to use?

[ganeshgore]

Sure, you can do that. You will have to makes changes to a couple of files

1. ./FPGA1212_QLSOFA_HD_PNR/FPGA1212_QLSOFA_HD_task/arch/openfpga_arch.xml defines the standard cell mapping (sky130_fdsc* for Sky130) change that to your preferred standard cell.
2. FPGA1212_QLSOFA_HD_PNR/FPGA1212_QLSOFA_HD_task/sc_verilog this directory also has few standard cells defined please change that as well.

With those changes, you should be able to generate a new Verilog netlist with your preferred standard cell library using OpenFPGA.