Problem: Trying to reset the DMA engine does not result in any effect. The most critical of them is
not clearing the DONE bit, causing us to detect an invalid finished DMA transaction.
For now, we must check the DONE and BUSY bits in order to detect a DMA finished status. The DONE bit is always 1, so maybe we need to check FPGA reset signal.
Problem: Trying to reset the DMA engine does not result in any effect. The most critical of them is not clearing the DONE bit, causing us to detect an invalid finished DMA transaction.
For now, we must check the DONE and BUSY bits in order to detect a DMA finished status. The DONE bit is always 1, so maybe we need to check FPGA reset signal.