Problem: As of now, AD9510 CLK1 input (external clock) is put in power-down state when CLK2 (Si571 clock) is in use. However, tests have shown considerable crosstalk of clocks when using external clock in FMC ADC 250M boards with Si571 configured in close-by frequency.
It would be desirable to disable Si571 output or even powering it down when using external clock.
Problem: As of now, AD9510 CLK1 input (external clock) is put in power-down state when CLK2 (Si571 clock) is in use. However, tests have shown considerable crosstalk of clocks when using external clock in FMC ADC 250M boards with Si571 configured in close-by frequency.
It would be desirable to disable Si571 output or even powering it down when using external clock.