This is for coordination between potential porters who may simultaneously step up, to port memtest86+ to LoongArch.
Note: according to upstream issues memtest86plus/memtest86plus#147 and memtest86plus/memtest86plus#285, this port would not get mainlined in the foreseeable future, due to maintenance burden and impossibility to test on their side. However, the upstream does favor a separately maintained fork -- meaning the porter would become the upstream for the resulting port.
This is for coordination between potential porters who may simultaneously step up, to port memtest86+ to LoongArch.
Note: according to upstream issues memtest86plus/memtest86plus#147 and memtest86plus/memtest86plus#285, this port would not get mainlined in the foreseeable future, due to maintenance burden and impossibility to test on their side. However, the upstream does favor a separately maintained fork -- meaning the porter would become the upstream for the resulting port.