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lowRISC / ibex

Ibex is a small 32 bit RISC-V CPU core, previously known as zero-riscy.
https://www.lowrisc.org
Apache License 2.0
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[syn] Add more robust error detection/reporting to synthesis flow #1194

Open GregAC opened 4 years ago

GregAC commented 4 years ago

The synthesis flow uses a variety of python, shell and TCL scripts that expect certain things to be correct. When it breaks the errors it produces don't obviously point to the problem (as illustrated by https://github.com/lowRISC/ibex/issues/1193)

More thought should be put into detecting issues at the point they occur in the flow so sensible error reporting can occur.

rswarbrick commented 3 years ago

@GregAC: What concrete steps do you think need taking before we can close this issue? At the moment, it'll probably remain open forever, which is not massively helpful.

GregAC commented 3 years ago

I am looking at it as part of the work I'm doing around timing/feedthroughs.

Two main things to look at:

  1. Add better error handling to the bits of python (not sure there's any at the moment)
  2. Look into what error handling can be added to the tcl bits. Yosys/OpenSTA may just exit with an error code rather than allowing the tcl to do anything (or just write to stderr but command completes with no indications of problems on the TCL side) but I need to work that out.