HI, after succesfully compiling the hello_test, running the simulator and opened the VCD file in GTKwave, I am trying to understand which are the output signals but I couldnt understand it. I have visited rtl to find out the which signals belongs to which SystemVerilog file and module. But I found that some module names in the GTKwave not directly matching the names in rtl , like i can find ibex simple system in GTKwave but not in rtl. This made me quite confused when to figure out which signals belong to which SystemVerilog file. Is there a way for me to understand them? some sort of documentation that I might have missed out?
HI, after succesfully compiling the
hello_test
, running the simulator and opened the VCD file in GTKwave, I am trying to understand which are the output signals but I couldnt understand it. I have visitedrtl
to find out the which signals belongs to which SystemVerilog file and module. But I found that some module names in the GTKwave not directly matching the names inrtl
, like i can findibex simple system
in GTKwave but not inrtl
. This made me quite confused when to figure out which signals belong to which SystemVerilog file. Is there a way for me to understand them? some sort of documentation that I might have missed out?