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lowRISC / ibex

Ibex is a small 32 bit RISC-V CPU core, previously known as zero-riscy.
https://www.lowrisc.org
Apache License 2.0
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Check alignment of Ibex bus interface with "OBI" bus standard #758

Open imphil opened 4 years ago

imphil commented 4 years ago

The OpenHW group, which continues the development of the ETH/PULP RISCY core as CV32E40P, has published a more complete description of the bus interface that also Ibex uses at https://github.com/openhwgroup/core-v-docs/blob/master/cores/cv32e40p/OBI-v1.0.pdf (no source code or HTML version is available AFAIK). We should check if our interface matches their description, and document compatibility or divergence as needed (at least the reset signal is named differently from what I've seen on a first look).

We also should add a protocol checker to our code base to ensure that we stay compliant with it.

@Silabs-ArjanB do you have a protocol checker in your code base (e.g. something like the one we have in OpenTitan for TL-UL at https://github.com/lowRISC/opentitan/blob/master/hw/ip/tlul/rtl/tlul_assert.sv (docs), or do you have plans for such a module? It would be good if we can share the development effort for such a module.

Silabs-ArjanB commented 4 years ago

We are developing assertions for the OBI protocol. It is my intention that these will be open-sourced (I will come back about this to get it confirmed). I don't think we need to be concerned about the exact naming if the only difference is prefixing or postfixing (see introduction of section 3.1)