search

lowRISC / lowrisc-chip

The root repo for lowRISC project and FPGA demos.
http://www.lowrisc.org/
Other
596 stars 148 forks source link

Question about the new version of the Nexys 4 DDR FPGA board (Nexys A7) #120

Closed noureddine-as closed 5 years ago

noureddine-as commented 5 years ago

Hello Dr. Jonathan,

I wanted to buy the Nexys 4 DDR FPGA board here but apparently "The Nexys 4 DDR has been renamed to the Nexy A7". I don't if it's just a rebrand, or if there is any potential changes compared to the old version.

Has someone ever tested LowRISC (at least refresh-v0.6) on that new board? Or those will need modifications? If yes, what should be changed in the current project?

Thank you very much. Best regrads, Noureddine.

jrrk commented 5 years ago

I have not tried it. I think there may be some minor peripheral changes. If so, you can cater for this by reviewing and, if necessary, updating the constraints file.

Sent from my iPhone

On 5 Sep 2019, at 13:01, Noureddine Ait Said notifications@github.com wrote:

Hello Dr. Jonathan,

I wanted to buy the Nexys 4 DDR FPGA board here but apparently "The Nexys 4 DDR has been renamed to the Nexy A7". I don't if it's just a rebrand, or if there is any potential changes compared to the old version.

Has someone ever tested LowRISC (at least refresh-v0.6) on that new board? Or those will need modifications? If yes, what should be changed in the current project?

Thank you very much. Best regrads, Noureddine.

— You are receiving this because you are subscribed to this thread. Reply to this email directly, view it on GitHub, or mute the thread.

noureddine-as commented 5 years ago

Comparing the Nexys-A7-100T-Master.xdc and Nexys-4-DDR-Master.xdc files from https://github.com/Digilent/digilent-xdc

The only difference is in Pmod Header JXADC where IOSTANDARD LVDS is changed to IOSTANDARD LVCMOS33. So i guess this does not affect the actual project, isn't it ?

jrrk commented 5 years ago

You are correct, JXADC is not used.

noureddine-as commented 5 years ago

Also, I noticed there is a difference in the Block RAM size, from Nexys 4 DDR has 4,860 Kbits and Nexys A7 has 1,188 Kb. And this constraints the maximum size of the bootloader, isn't it? do you thing it's going to be a problem?

https://reference.digilentinc.com/reference/programmable-logic/nexys-4-ddr/start https://reference.digilentinc.com/reference/programmable-logic/nexys-a7/start

jrrk commented 5 years ago

You should ignore the A7-50 variant, it is unsuitable.

noureddine-as commented 5 years ago

Okay, I ordered the Nexys A7-100T. It may take a while before it arrives (4-5 weeks at least), and will post my updates here whenever I have news. Thanks!

noureddine-as commented 5 years ago

Just received the Nexys A7 100-T, and didn't need to change anything, they are the same.

Apparently the links I posted earlier contain different information. here is the one we aquired: https://store.digilentinc.com/nexys-a7-fpga-trainer-board-recommended-for-ece-curriculum/