lowRISC / lowrisc-chip

The root repo for lowRISC project and FPGA demos.
http://www.lowrisc.org/
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Is L2 inclusive or not? #45

Closed sxu55 closed 7 years ago

sxu55 commented 7 years ago

It seems to me that the L2 cache implementation in the Uncore is neither inclusive nor exclusive, because the eviction policy doesn't distinguish cached/uncached lines in tile caches. Could you confirm if my understanding is correct or not? Thanks.

wsong83 commented 7 years ago

It is inclusive. Why do you believe "the eviction policy doesn't distinguish cached/uncached lines"? When a line is replaced, if I recall it right, the writeback unit will probe all L1s who may have the latest value.

sxu55 commented 7 years ago

Never mind, I forgot the fact that it does back invalidation. Thanks for your reply.