Where is dev_map.h?

[neocogent]

I've been trying to get a build environment set up for fpga testing. I've tried meticulously to follow the info here and on lowrisc.org/docs but have hit a wall.

I'm trying to run the riscv-tools/make_root.sh script to create a root.bin. It sets a variable for the intended fpga board eg. nexys_ddr. It tries to build bbl for the fpga bootloader but dev_map.h is missing. I've searched everywhere and this file appears to not exist.

build bbl...
configure: WARNING: using cross tools not prefixed with host triplet
In file included from ../machine/mtrap.h:4:0,
                 from ../bbl/bbl.c:2:
../machine/encoding.h:6:21: fatal error: dev_map.h: No such file or directory
 #include "dev_map.h"
                     ^
compilation terminated.
In file included from ../machine/mtrap.h:4:0,
                 from ../bbl/kernel_elf.c:3:
../machine/encoding.h:6:21: fatal error: dev_map.h: No such file or directory
 #include "dev_map.h"
                     ^
compilation terminated.
make: *** [bbl.o] Error 1
make: *** Waiting for unfinished jobs....
make: *** [kernel_elf.o] Error 1

I tried just commenting it out but it actually appears to need the value

#define DRAM_BASE          DEV_MAP__mem__BASE

For several places in that build.

I'm building linux-4.6.2 and busybox-1.2.1. It appears everything is as current as available.

Either I've missed a step somewhere, or some code is missing, or the current docs aren't complete in how to build everything. I'd appreciate any suggestions. It does seem to me that there ought to be a dev_map.h included with the board specific files but none is present for me.

Thx.

[jrrk]

This file gets auto-generated when you build the Chisel subsystem. See the simulation or FPGA instructions, and carry out this action before trying to build Linux.

Sent from my iPhone

On 5 Jun 2017, at 17:13, neoCogent notifications@github.com wrote:

I've been trying to get a build environment set up for fpga testing. I've tried meticulously to follow the info here and on lowrisc.org/docs but have hit a wall.

I'm trying to run the riscv-tools/make_root.sh script to create a root.bin. It sets a variable for the intended fpga board eg. nexys_ddr. It tries to build bbl for the fpga bootloader but dev_map.h is missing. I've searched everywhere and this file appears to not exist.

build bbl... configure: WARNING: using cross tools not prefixed with host triplet In file included from ../machine/mtrap.h:4:0, from ../bbl/bbl.c:2: ../machine/encoding.h:6:21: fatal error: dev_map.h: No such file or directory

include "dev_map.h"

                 ^

compilation terminated. In file included from ../machine/mtrap.h:4:0, from ../bbl/kernel_elf.c:3: ../machine/encoding.h:6:21: fatal error: dev_map.h: No such file or directory

include "dev_map.h"

                 ^

compilation terminated. make: [bbl.o] Error 1 make: Waiting for unfinished jobs.... make: *** [kernel_elf.o] Error 1

I tried just commenting it out but it actually appears to need the value

define DRAM_BASE DEV_MAPmemBASE

For several places in that build.

Either I've missed a step somewhere, or some code is missing, or the current docs aren't complete in how to build everything. I'd appreciate any suggestions. It does seem to me that there ought to be a dev_map.h included with the board specific files but none is present for me.

Thx.

— You are receiving this because you are subscribed to this thread. Reply to this email directly, view it on GitHub, or mute the thread.

[neocogent]

Ok. Thx. Will do.

Ah, I see now. I was following the tutorial step by step and the fpga steps are further down.

http://www.lowrisc.org/docs/untether-v0.2/

In part 2 it indicates about using make_root.sh to make the root.bin but that won't work until after you have done some fpga steps in part 3.

No worries. I'm trying the fpga "make project" now and will come back after.

Incidentally, I'm trying trying to build for Arty-7 board as that is what I have. Has anyone reported on whether the a35t device is sufficient compared to the a100t? I'd expect it should fit and the Arty7 board also has DDR on board. I have modified the xdc constraints and replace the mig config. Guess I'll see...

[wsong83]

Some extra notice has now been added to the tutorial near the Linux kernel build process.

As for your new question, the biggest issue I can see for a35t is the size. You might want to significantly cut down the whole design. Such as removing all IO peripherals not used, removing L2, removing trace debugger, removing FPU, etc.

The default configuration consumes ~70% of the LUTs on a100t, that is around 200% of the LUTs on a35t!

I am closing this for now as the original question has been resolved.