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lowRISC / opentitan

OpenTitan: Open source silicon root of trust
https://www.opentitan.org
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[clkmgr, fpga] Enhance clkmgr to allow for different types of clock gates per module #11073

Open tjaychen opened 2 years ago

tjaychen commented 2 years ago

Specifically, allow additional attributes in the top hjson file to specify what kind of FPGA clock gates a particular module should use. See #11063 for motivation.

tjaychen commented 2 years ago

@vogelpi FYI

vogelpi commented 2 years ago

Cool, thanks for creating this issue @tjaychen . Automating this based on the top-level sounds like a good idea.

andreaskurth commented 1 year ago

Triaged for clkmgr. I think this isn't needed for the current release, so https://github.com/lowRISC/opentitan/labels/Type%3AFutureRelease seems appropriate.

msfschaffner commented 11 months ago

CC @a-will

a-will commented 11 months ago

This can actually be specified with prim-specific localparams + hierarchical paths to set it from the chip_* layer (which can come from either the template or hjson, depending on implementation in topgen). I initially did this with spi_device for CW340, but then I found a different way (converted some of the higher-layer clock prims to abstract).