Closed trrrraum closed 2 years ago
In addition, the following warning message appears when building: [filemgmt 56-3] Default IP Output Path : Could not find the directory '/home/wangxiao/opentitan/opentitan/build/lowrisc_systems_chip_earlgrey_cw310_0.1/synth-vivado/lowrisc_systems_chip_earlgrey_cw310_0.1.gen/sources_1'. I don't know if it has something to do with this warning
I didn't use bazel to build the FPGA, I used: ./meson_init.sh ninja -C build-out all fusesoc --verbose --cores-root . run --flag=fileset_top --target=synth lowrisc:systems:chip_earlgrey_cw310
The meson build flow has been deprecated and is not supported anymore. Please try again with the bazel build flow and reopen if the warnings still persist.
When building opentitan with FPGA, bitstream is successfully generated, but looking at Hierarchy, I found that xil_defaultlib.xxxxxx are instantiated under many header files, but they are not added to the project. Could anyone tell me which step is the problem? Thanks!