lowRISC / opentitan

OpenTitan: Open source silicon root of trust
https://www.opentitan.org
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[test-triage] chip_tap_straps_prod #14676

Closed johngt closed 2 years ago

johngt commented 2 years ago

Hierarchy of regression failure

Chip Level

Failure Description

Offending '(dft_jtag_i == '0)' has 1 failures:

Test chip_tap_straps_prod has 1 failures. 4.chip_tap_straps_prod.3522213289 Line 4817, in log /container/opentitan-public/scratch/os_regression/chip_earlgrey_asic-sim-vcs/4.chip_tap_straps_prod/latest/run.log

  Offending '(dft_jtag_i == '0)'

UVM_ERROR @ 3571.770040 us: (pinmux_strap_sampling.sv:303) [ASSERT FAILED] DftTapOff1_A UVM_INFO @ 3571.770040 us: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---

Steps to Reproduce

New issue that has come up over the last nightly. Tuesday August 30 2022 07:08:49 UTC GH revision: https://github.com/lowrisc/opentitan/tree/6be5b88705e3e48dc9e3de7bca93313528f1274e Build seed: 2532933437

Tests with similar or related failures

johngt commented 2 years ago

Assigning to @engdoreis to take a first look into this.

weicaiyang commented 2 years ago

error message is changed to UVM_ERROR @ 2836.217419 us: (chip_if.sv:124) [tb.dut.chip_if] Detected an X on IoR3

May relate to recent TB IO update. I will take a look