lowRISC / opentitan

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[SPI_Host] Flash BFM Integration #15072

Open johngt opened 2 years ago

johngt commented 2 years ago

To ensure SPI_Host compatibility with the desired flash chip we should bring in the BFM model (SystemVerilog) and ensure that it interacts with SPI in the desired manner. For further details see - https://docs.opentitan.org/hw/ip/spi_host/doc/

The flash chip that we intend to get working with OT and want to ensure we have compatibility before generating the RTL freeze is W25Q01JV. Further details available at - https://www.winbond.com/hq/product/code-storage-flash-memory/serial-nor-flash/?__locale=en&partNo=W25Q01JV In particular the model is available at https://www.winbond.com/hq/support/documentation/?__locale=en&line=/product/code-storage-flash-memory/index.html&family=/product/code-storage-flash-memory/serial-nor-flash/index.html&pno=W25Q01JV&category=/.categories/resources/verilog-model/

The model is closed source so part of the effort will be in determining how we can get the model used in CI without breaking the terms of the licence. Suggestion would be looking at the private CI instances that are used for EDA tooling / licenses and having the model integrated at that point.

estimate 16 Corresponds to SH:2 on internal tracking

johngt commented 2 years ago

Tagging @GregAC to comment on any additional points that he envisaged when looking at the initial task description.

GregAC commented 2 years ago

Tagging @GregAC to comment on any additional points that he envisaged when looking at the initial task description.

This looks reasonable to me

abdullahvarici commented 1 year ago

I have started to work on this issue. I have managed to connect the Winbond BFM to SPI_Host and send transactions. For example I saw that the value of a memory element changed. But I am having some problems and trying to have better understanding of the design. Since this initial work was mostly for exploring, the code is not in a good shape. I'll have meetings with @andreaskurth / @vogelpi and create a PR after improving the code and fixing the problems.

moidx commented 1 year ago

Hi @abdullahvarici, lets sync before submitting any PRs to the public domain, and in the meantime coordinate logistics with @vogelpi. Thanks!

abdullahvarici commented 1 year ago

See https://github.com/lowRISC/opentitan-embargoed/pull/91

johngt commented 1 year ago

Per various discussions on Winbond BFM model, moving this to a post M2 task. Assigning as V3 so that it doesn't get lost and also M3 for now.

andreaskurth commented 1 year ago

Triaged for spi_host. This is about integrating a BFM for a flash chip in block-level DV, which is planned post M2.5. Thus I'm assigning it to https://github.com/lowRISC/opentitan/labels/Type%3AIcebox.