[top_darjeeling] Clock / Power / Reset Integration

[tjaychen]

desc

Need to examine for the integrated use case, how the clock / power / reset integration changes.

1. Is it safe to make the same assumptions regarding power up? Can we assume the regulators / clocks necessary are available? Does the sequence need to change?
2. Can we assume a similar clocking structure where existing clock enables could turn clocks off in a similar way
3. For resets, what can we assume about the outside world in terms of reset control hook-ups and reset feedback?

[tjaychen]

@jeoongp