[rstmgr] Make `rstmgr` DV top-level agnostic

[vogelpi]

Description

When working on Integrated, we've noticed that rstmgr DV is not always top-level agnostic and in some cases is tailored to the rstmgr instance of Earlgrey. For example, the SVA bind file rstmgr_bind.sv interfacing the SVAs inside rstmgr_sw_rst_sva.if.sv (both living under hw/ip/rstmgr/dv/sva) relies on specific rests or hardware blocks being clocked with certain clocks:

  bind rstmgr rstmgr_sw_rst_sva_if rstmgr_sw_rst_sva_if (
    .clk_i({
      clk_io_div4_i,
      clk_io_div4_i,
      clk_io_div4_i,
      clk_aon_i,
      clk_usb_i,
      clk_io_div2_i,
      clk_io_i,
      clk_io_div4_i
    }),
    ...
    .rst_ns({
      resets_o.rst_i2c2_n[1],
      resets_o.rst_i2c1_n[1],
      resets_o.rst_i2c0_n[1],
      resets_o.rst_usb_aon_n[1],
      resets_o.rst_usb_n[1],
      resets_o.rst_spi_host1_n[1],
      resets_o.rst_spi_host0_n[1],
      resets_o.rst_spi_device_n[1]
    })
  );

If spi_host0 is for example not running on the clk_io_i clock, we see plenty of assertions failures like this:

Offending '(gen_assertions[1].rst_cause || (!rst_ens[1]))'
                UVM_ERROR @ 137085183 ps: (rstmgr_sw_rst_sva_if.sv:41) [ASSERT FAILED] RstEnOff_A

To fix this, the bind file should be auto-generated and be placed in the top-specific folder, i.e., hw/top_earlgrey/ip/rstmgr/dv.

[msfschaffner]

CC @matutem

[matutem]

This is a multi-top issue. Fixing it is not required for Earlgrey PROD, though the multi-top schedule could cause the fix to become available.