Closed msfschaffner closed 7 months ago
git rev-parse --short HEAD
9ddf276c64
git log Earlgrey-M2.5.2-RC0..HEAD --oneline hw/ip/edn
15f5b15407 [edn/dv] Force the CSRNG valid signal to high in alert_vseq
e02952c90c [edn/dv] Add coverage for the new hw_cmd_sts register
5583394b0a [edn/rtl] Add assertion to guarantee no interactions with CSRNG after err
317a9e7949 [edn/dv] Add new alert test to alert vseq
35f2844f39 [edn/rtl] Add checks to the scoreboard for the new hw_cmd_sts register
30bb26f7f3 [edn/dv] Adapt DV to the new changes
747d894bc9 [edn/rtl] Assign signals to the new hw_cmd_sts register
96c75dc00c [edn/rtl] Enter recoverable alert state when error is received from CSRNG
39af375e1e [edn/rtl] Add new recoverable alert
7f3b59c216 [edn/rtl] Add register for displaying HW cmd status
41e4539f7a [edn/rtl] Signal all recoverable alerts
-> RTL, DV and SW changes to properly handle error responses from CSRNG
eabff1f9e0 [edn/dv] Make genbits_vseq wait to enter Idle after boot mode
d3f62603a4 [edn/dv] Fix newly failing edn_err vseq
7fa4657a63 [edn/dv] Add checks for sw_cmd_sts to the scoreboard
b495f9d986 [edn/dv] Fix failing disable_vseq tests
75f693386a [edn/doc] Adapt EDN block diagram to the changes
987d5be04a [edn/dv] Remove obsolete states from test cases
75df0aeca1 [edn/rtl] Handle backpressure from CSRNG without an output FIFO
57ba114376 [edn/rtl] Remove RTL changes done for the output FIFO
-> RTL and DV changes to remove the redudant output FIFO and handle CSRNG back pressure correctly (saves 13*384 FFs) for each instance
56399241e7 Revert "[edn] Move prim_edn_req out of prim"
c721c51c13 [rtl, prim] Add 'commit' functionality to prim_count
61a237e197 [util/reggen] reverse order of substruct generation
6d3bd21e6b [edn/dv] Add covergroups for the sw_cmd_sts reg and csrng cmd rsp
c6fc953df8 [edn/doc] Align the documentation with the new sw_cmd_sts register
e76a7313cc [edn/dv] Add checks to scoreboard for the new cmd_ack and cmd_sts fields
5f165017d3 [edn/dv] Turn off assertions when disabling and reenabling EDN in err vseq
a97410824b [edn/rtl] Change sw_cmd_sts register
-> RTL, DV and SW changes to rework the SW command status register and make it more useful, this is preparatory work for the output FIFO removal but also improves and simplifies the SW API
936fb046ad [edn/dv] raise test timeout for edn_disable test
862b811d9e [edn/dv] Fix failing edn_genbits tests
3b4e36e01c [edn] Move prim_edn_req out of prim
ad83b931a5 [edn/doc] Adapt documentation to the new transition to SW mode
da8d6f27a4 [edn] Adapt coverage to the new transition to SW mode
2f734b3336 [edn] Adapt edn_genbits vseq to test the new transition to SW mode
e87d639552 [edn] Align the scoreboard with the new transition to SW mode
a47ee96ce8 [edn] Add transition to SW mode after boot sequence is done
deed3d7fe9 [edn/rtl] Set sw_cmd_valid_o to high in sw mode and during auto instantiate
-> RTL and DV changes to transition into SW mode after boot sequence rather than accepting SW commands in boot mode, this improves / simplifies the API but it also beneficial for security
564d414b4f [edn] Add new states to SM state_e typedef enum
686dc2eebd [edn/doc] Update documentation to explain when auto cmd FIFOs are cleared
9e9739058f [edn] Get the DV environment in line with resetting FIFOs after EDN is disabled
99acbee563 [edn] Reset auto cmd FIFOs when EDN is disabled
-> Align clearing of command FIFOs between disabling and exiting auto-mode, previously they were not cleared upon disabling
de31bdf1c2 [reggen] Remove the devmode input
d3f0ae750d [edn/dv] Fix failing edn_err_vseq tests
e2e668ed57 [edn/dv] Add option to skip wait_cmd_req_done() in wr_cmd()
51b9d9accf [edn/dv] Use the new ack_sm enum type for the edn_err_vseq
9682c05efa [edn/dv] Add enum type for ack sm states
975a6eb927 [adc_ctrl,dv] Tidy up access to intr_state in env_cfg files
6124771b23 [edn/doc] Mention reseed interval reset value in documentation
8daef2c480 [edn/doc] Update sum_sts strings to main_sm_state
fc1ede305f [edn/test] Add FIFO reset to prevent overflow
2d0778a47c [edn/cov] Fix small nits
d8c3e83fd8 [edn/dv] Increase the number of reseeds for edn_genbits test
2b010d0aca [edn/dv] Add generate cmds with different glen to edn_genbits
daee47b1c0 [edn/dv] Add some edge cases to scoreboard for cmds
3ed7b5c53e [edn/dv] add additional command to edn_genbits_vseq
27bacc6955 [edn/dv] add operational mode and cmd src register cps to edn_cs_cmds_cg
b655b0e0c9 [edn/dv] add wr_cmd args mode and cmd_src
99ecee7671 [edn/dv] Add acmd cover point to cs_cmds cover group
e082349c97 [edn/dv] move coverage sample call to wr_cmd task
f5e4d5711b [edn/dv] Remove todo comment for intr test
e2dc7ddea6 [edn/dv] Add output FIFO errors to edn_err test
4077568a2f [edn/dv] Add sequence to check issuing cmd during auto_req_mode
-> various DV cleanups and improvements
1a6ca943f4 [edn/rtl] align reseed cntr resval with MAX_NUM_REQS_BETWEEN_RESEEDS resval
-> simplification of RTL, DV and documentation by aligning reset values
a3b1bde5ce [chip-test] List EDN functional features and add SiVal test plan
b3118121b8 [edn/dv] check commands on EDN-CSRNG interface
-> DV improvement to check commands sent to CSRNG in block-level DV and to check the responses
ce7a92c9ff [edn] Define parameters for register reset values
1b16ca2122 [reggen] Add mubi support SWAccess that sets/clears a reg
18426d5a34 [edn,dv] Fix type of mailbox
in edn_disable_auto_req_mode_vseq
b0db0e2906 [edn,doc] Fix typo in README.md
59f8142826 [doc] Moved badges over to using hosted images
7688e714e8 [reggen] Add initial support for version and cip_id hjson fields
fbd888eea8 Revert "[reggen] Add CIP_IDs and bump all major versions"
912d2dcc8e [doc] edn registers now using CMDGEN
0ba10b3cd3 [reggen] Add CIP_IDs and bump all major versions
Chip-level test / SiVal issue, it got decided that this better tested on the chip.
There was the idea to optimize the width adaption in prim_edn_req
when interfacing big PRNGs. The new Trivium/Bivium primitives have this directly built in.
Closed as it's not relevant anymore.
Closed as not planned.
Closed as synthesis tools turn out to efficiently optimize away the unconnected EP ports.
Closed as not planned. The formulation of some guidance for the comportability spec is tracked in #20680.
One of the main issues taken care of for M2. This allows shaving of 13 x 32 FFs in each EDN instance. Fixed by https://github.com/lowRISC/opentitan/pull/21142.
AES not EDN specific. Closed as not planned.
Closed as not planned.
One of the main issues taken care of for M2. EDN is now able to properly handle error responses from CSRNG. Fixed by https://github.com/lowRISC/opentitan/pull/21280.
SiVal, closed as not relevant for Z1.
Fixed by https://github.com/lowRISC/opentitan/pull/19623 and https://github.com/lowRISC/opentitan/pull/19728.
A duplicate of #16269 which is tracked for V3 / M5.
Fixed by #20312
Fixed by #19623
Fixed by #20808
Fixed by #19987
Closed. It was found that for all current top levels, the EDNs and the consumers have the same logical root reset and that it thus isn't necessary to use the partial-reset-safe implementation as it would lower the performance of the interfaces / require further design changes.
Closed without RTL/DV changes. It turned out that certain fields of the main control registers were not correctly interpreted when analyzing test failures.
Closed without RTL/DV changes. It turned out that the logs were printed both in the A and D phase of the TL-UL access.
It has been decided to clear those FIFOs upon disabling. The change has been implemented in #20304.
It was concluded that SW commands should not be accepted in boot mode. Fixed by #20293.
Conclusion to align doc, RTL and DV for consistency. Fixed by https://github.com/lowRISC/opentitan/pull/19676 and https://github.com/lowRISC/opentitan/pull/20279
Closed without changes. The issue was simply outdated.
Closed without changes. Conclusion was that there is little to be gained by the proposed change.
Coverage holes closed by https://github.com/lowRISC/opentitan/pull/19986
SiVal, implemented by https://github.com/lowRISC/opentitan/pull/20022
SiVal, implemented by https://github.com/lowRISC/opentitan/pull/20149
SiVal, implemented by #20273
SiVal, implemented by https://github.com/lowRISC/opentitan/pull/20409
SiVal, implemented by https://github.com/lowRISC/opentitan/pull/20228
Not EDN specific, closed as not planned due to ROM size limitations.
FutureRelease
FutureRelease
It was concluded that the EDN interfaces aren't an issue.
Cryptolib
Tracked for V3 / M5.
CSRNG counterpart of error handling and messaging, tracked for M3.
Relevant for CSRNG, not EDN. Tracked for M3.
Tracked for M5.
Tracked for M4.
Relevant for ENTROPY_SRC and Darjeeling / other top levels only.
Cryptolib
Tracked for V3 / M5.
Tracked for V3 / M5.
This got overlooked. Now tracked for M4.
EDN-related tests already taken care of.
SiVal for CSRNG
SiVal
Test pass rate of around 85%. Tracked for V2(S) / M4.
Tracked for M3.
Coverage hole, tracked for V3 / M5. Related to #$16269.
SiVal
SiVal, some EDN tests (among many others) seem to be broken.
For M2, some big and long standing EDN RTL issues have finally been resolved which includes:
These changes mandate a major version increase as the SW API is modified quite heavily (especially around SW commands and error handling). A PR to bump the version is here: #22353
In addition, many little bug fixes and improvements were implemented. For all these changes, documentation, SW and DV were updated inline to keep test pass rates and coverage up and to ensure nothing breaks. No new TODOs have been added to the RTL. All checklist criteria are still met to sign off EDN at D2S and this is what I am proposing.
@andreaskurth , @h-filali , would you mind taking a look at this and let me know what you think?
Thanks for this comprehensive signoff analysis, @vogelpi.
I reviewed the following commits, which modify edn's RTL (based on git log --oneline Earlgrey-M2.5.2-RC0..HEAD -- hw/ip/edn/rtl
), in detail:
HW_CMD_STS
CSR with information on the interaction with CSRNGHW_CMD_STS
CSRSW_CMD_STS
CSRsw_cmd_valid_o
of the main FSMu_prim_count_max_reqs_cntr
All these changes LGTM, and based on your assessment that they are all covered by DV, I agree with keeping D2S.
There's one open issue, #19789, that tracks a bugfix for EDN. It is part of M4, so no blocker for D2S signoff.
--> Let's keep EDN at D2S.
Description
Ensure D2 signoff criteria are fulfilled after focus area changes have landed.