[dv, chip, env]: set_and_release_sw_strap_nonblocking task fails to set the sw_strap pins (for bootstrap) when run with real ROM

[walaahattab]

Description

The set_and_release_sw_strap_nonblocking task is written to set sw_strap pins for bootstrap mode using "use_spi_load_bootstrap" only when the test' status is "SwTestStatusInBootRom" which exists only in Test ROM and not in real ROM.

https://github.com/lowRISC/opentitan/blob/641d7b11a82a9cc69360642d139db9c236f6c072/hw/top_earlgrey/dv/env/seq_lib/chip_sw_base_vseq.sv#L22-L31

Below described "SwTestStatusInBootRom" status: https://github.com/lowRISC/opentitan/blob/641d7b11a82a9cc69360642d139db9c236f6c072/sw/device/lib/testing/test_framework/status.h#L20-L26

[walaahattab]

@sha-ron

[timothytrippel]

I don't believe this should be handled in the ROM. Is it not possible to update the DV sequence to apply the strapping pins before reset, and then remove them right before the next reset? We should not have to rely on a symbol in the SW to indicate the state of the chip to apply the bootstrap strapping pin values (we do not do so for the FPGA either).

[walaahattab]

I don't believe this should be handled in the ROM. Is it not possible to update the DV sequence to apply the strapping pins before reset, and then remove them right before the next reset? We should not have to rely on a symbol in the SW to indicate the state of the chip to apply the bootstrap strapping pin values (we do not do so for the FPGA either).

Yes, this can be done in the DV sequence. I opened the issue to highlight a limitation in the current implementation when using 'use_spi_load_bootstrap' plusarg in 'real ROM' running mode.

[sha-ron]

So it is ok to postpone the fix. I will clear the milestone.