antmarzam
commented
4 weeks ago DESIGN_DELTAS_CAPTURED_V2
List of commits since ES. The list has been compiled via:
git log Earlgrey-M2.5.2-RC0..HEAD hw/ip/spi_host/ hw/dv/sv/spi_agent/Newer commits at the top (reverts have been removed):
- d268f271f4 [spi_host/doc]: Correct RST -> SW_RST typo
- doc change
- ee5f4a1abf [sram_ctrl] Add readback feature
- RTL sram_ctrl change
- 11107d5e80 [spi_host] Disable FWFT for the command queue
- RTL change - Eliminates First Word Fallthrough in command queue
- 12f60880bd [dv] spi_device_scoreboard flash_status fix
- spi_agent comment cleanup
- 432200b06e [dv] spi_monitor fix:
- spi_agent fix (related to spi_device upbringing)
- dc848b3e2a [sram_ctrl,prim,rtl] Fix tlul_we -> ready timing path.
- sram_ctrl, prim RTL changes
- 66f99a7c3f [spi_host,doc] Cleanup readme and theory-of-operations
- doc cleanup
- ed56f75219 [spi_host,doc] Move misplaced doc sections around, fixup errors
- Doc fixup
- 45b6e02e10 [spi_host,doc] Update diagrams to seperate passthrough mux
- Doc diagram update
- 8295903d7e [bazel,autogen_hjson] Split C and rust header generation
- Bazel change
- 30d7e787c7 Add the project name to the copyright header
- f4c2bb9030 Remove trailing whitespaces
- a5ce859c07 [spi_host,doc] Clarify that the 'spi_event' interrupt is Status-Type
- doc change
- 3e9cb7bea6 [spi_host,dv] Update testplan based on D2(S) changes
- testplan change
- ec43583573 [dv] intercept sequence && intr_status stimulus update
- DV changes to spi_agent (related to spi_device upbringing)
- 42dfffeb8c [dv] flash_status dynamically updated TB update
- DV changes to spi_agent (related to spi_device upbringing)
- 9868fa8aa9 [spi_host] Downgrade verification_stage to V1
- Sing-off criteria was downgraded to V1
- 508cd2ff22 [spi_host] Correct TXFULL description
- DOC typo fix
- 18b0cedda1 [dv] Remove phase argument from monitor's collect_trans
- common DV fix across the project
- 6e1273580f [spi_host] Fix "bute"/"byte" typo in registers
- doc change
- e3ca274e77 [spi_host,rtl] Use sd_en_o[0] to only drive sd_o[0] during TX (std_mode)
- RTL change
- f7fc348358 [spi_host,rtl] Change 'spi_event' interrupt to CIP 'Status' type
- RTL+SW+Doc change
- 369be91feb [spi_host,doc] Regenerate register documentation
- doc change
- 272787cf68 [spi_host,rtl] Factor the byte_sel block into TX FIFO status signals
- RTL+DV+doc to incorporate byte select signal into TX FIFO status
- 0d14dd693f [docs] Fix repetitions of the definite article
- doc change
- 61a237e197 [util/reggen] reverse order of substruct generation
- reggen order reversed
- fc8484601e [reggen,hw] Create index parameter for registers windows
- Add Index parameters to RTL reg package
- de31bdf1c2 [reggen] Remove the devmode input
- devmode input remove from exclusions top-level, reg_top and README
- 963a5006cc [doc] Minor tweak to md sanitisation code
- doc cleanup
- 975a6eb927 [adc_ctrl,dv] Tidy up access to intr_state in env_cfg files
- Code tidy up
- 3f128e781f [spi_host] Add feature list for block
- Feature list added to spi_host.hjson
- 1b16ca2122 [reggen] Add mubi support SWAccess that sets/clears a reg
- RTL reg change
- 59f8142826 [doc] Moved badges over to using hosted images
- doc change
- 8c772349f3 [doc] spi_host registers and interfaces now use CMDGEN
- doc change
- 7688e714e8 [reggen] Add initial support for version and cip_id hjson fields
- Regtool change
Apart from the above, the following spi_host PRs are open as of now:
- RTL PRs:
- SW PRs:
- DV PRs:
DV_DOC_COMPLETED All RTL changes have been reflected in the spec
FUNCTIONAL_COVERAGE_IMPLEMENTED Yes
ALL_INTERFACES_EXERCISED Yes
ALL_ASSERTION_CHECKS_ADDED There's an SVA based check in PR
SIM_TB_ENV_COMPLETED Yes
SIM_ALL_TESTS_PASSING Not true in an absolute manner but true for our metrics. Latest regression run had a passing rate of 684/690
SIM_NIGHTLY_REGRESSION_V2 Yes
SIM_CODE_COVERAGE_V2 CCOV is over 90%, branch coverage is the lowest at 92%
SIM_FUNCTIONAL_COVERAGE_V2 Yes, current metric is 90.87% for FCOV
SEC_CM_PLANNED Yes, and already implemented
NO_HIGH_PRIORITY_ISSUES_PENDING, ALL_LOW_PRIORITY_ISSUES_ROOT_CAUSED P1 issue : But there are currently 2 PR opened (mentioned above) one for DV one for RTL
DV_DOC_TESTPLAN_REVIEWED Yes
V3_CHECKLIST_SCOPED The checklist hasn't been scoped, but given the coverage numbers (shown below). I anticipate an effort of up to 2-3 weeks to close coverage and do the necessary cleanup
Coverage numbers as of 4/6/24:
Note: FPV and SIM_FW_SIMULATED have been removed from above list since they don't apply to spi device.
johngt
rswarbrick
Description
Get spi_host ready for V2S signoff and sign it off