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[question] How to convert specific command in .f to .core file #24727

Open desorya opened 2 days ago

desorya commented 2 days ago

Hi there,

I got some issues building the core file.

In fusesoc cores, to specify the file_type as systemVerilogSource would let VCS parsing files as design file. However, there are several commands could be applied in .f file list like -v and -y. I'd like to know how to convert those command into fusecores?

For example, I have my .f file list as below:

+incdir+ace/include
-v ace/hdl/insn_svstore.sv  // Will be treated as library file in VCS

-y biu/hdl   // Files under this directory will be treated as library directory file

Compile above .f file list, the compile log shown as below:

Parsing library file '/home/ace/hdl/insn_svstore.sv'
Parsing library directory file '/home/biu/hdl/vc_biu.v'

I wonder how should I realize those build message in core file?

Thank you.

rswarbrick commented 1 day ago

This would be easier to help with if you could give slightly more information about what you're running (and what happens) but I think I can probably help. In OpenTitan, we basically just use FuseSoC to generate a file list (and some auto-generated bits of RTL). The command that runs the EDA tool (VCS in your example) is constructed by the dvsim tool.

This is configured by some json config files, but you might find what you want in hw/dv/tools/dvsim/vcs.hjson.

desorya commented 1 day ago

This would be easier to help with if you could give slightly more information about what you're running (and what happens) but I think I can probably help. In OpenTitan, we basically just use FuseSoC to generate a file list (and some auto-generated bits of RTL). The command that runs the EDA tool (VCS in your example) is constructed by the dvsim tool.

Hi @rswarbrick, Thanks for your reply, let me explain: In FuseSoc core, if you specify the file_type as file_type: systemVerilogSource like below:

filesets:
    files_rtl:
         files:
            - rtl_a.sv
         file_type: systemVerilogSource

In the build.log of DVSim, the rtl_a.sv will be compiled as design file:

Parsing design file: '/home/design_dir/rtl_a.sv'

However, in typical .f file list, there are some commands to specify the type(such as library) of the corresponding files:

-v design_dir/rtl_a.sv

The -v command is used for specify a .v library which VCS could look for the module in the library, the compile log message for this library in the log file could be:

Parsing library file `/home/design_dir/rtl_a.sv`

Therefore if I want to use the Fusesoc core, I need a way to convert this command from .f file list into cores within a correct format to get the same compile message.

Thank you!